The 9ZXL1251E is a second-generation, enhanced performance DB1200ZL differential buffer. The part is a pin-compatible upgrade to the 9ZXL1251A, while offering much improved phase jitter performance and increased system security features. A fixed external feedback maintains low drift for critical QPI/UPI applications.
特長
- LP-HCSL outputs with 85Ω Zout; eliminate 48 resistors, save 82mm² of area
- PCIe Gen 1–5 compliance
- 12 OE# pins; hardware control of each output
- 9 selectable SMBus addresses; multiple devices can share the same SMBus segment
- Selectable PLL BW; minimizes jitter peaking in cascaded PLL topologies
- Hardware/SMBus control of PLL bandwidth and bypass; change mode without power cycle
- Spread spectrum compatible; tracks spreading input clock for EMI reduction
- 100MHz and 133.33MHz PLL Mode; UPI and legacy QPI support
- 9 x 9 mm 64-VFQFPN package; small board footprint