The SH7730 uses an SH-4A CPU core with a maximum operating frequency of 266MHz. The SH7730 has an on-chip bus state controller (BSC) that allows connection to synchronous DRAM. This LSI is also built in with a variety of peripheral functions such as direct memory access controller (DMAC), timer, six serial communication interfaces, A/D converter and I/O ports.

Applications

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CPU Bit Size Program Memory (KB) Data Flash (KB) RAM (KB) Lead Count (#) Supply Voltage (V) Operating Freq (Max) (Mhz) CAN (ch) I/O Ports Timer ADC DAC USB DMA Ethernet RTC LVD Human Machine Interface PLP Temp. Range Buy / Sample
R8A77301C200FPV#U0
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Pkg. Info
Env. Documentation
 SH-4A 32 0 0 16 208 3 - 3.6 200 107 16-bit x 6-ch, 32-bit x 8-ch 10-bit x 4-ch 10-bit x 2-ch Yes No 1 2025 Mar -20 to 75°C
R8A77301C200FPV#UM
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Pkg. Info
Env. Documentation
 SH-4A 32 0 0 16 208 3 - 3.6 200 107 16-bit x 6-ch, 32-bit x 8-ch 10-bit x 4-ch 10-bit x 2-ch Yes No 1 2025 Mar -20 to 75°C
R8A77301C266FPV#U0
Active
Pkg. Info
Env. Documentation
 SH-4A 32 0 0 16 208 3 - 3.6 266 107 16-bit x 6-ch, 32-bit x 8-ch 10-bit x 4-ch 10-bit x 2-ch Yes No 1 2025 Mar -20 to 75°C
R8A77301C266FPV#UM
Active
Pkg. Info
Env. Documentation
 SH-4A 32 0 0 16 208 3 - 3.6 266 107 16-bit x 6-ch, 32-bit x 8-ch 10-bit x 4-ch 10-bit x 2-ch Yes No 1 2025 Mar -20 to 75°C
R8A77301D266FPV#U0
Active
Pkg. Info
Env. Documentation
 SH-4A 32 0 0 16 208 3 - 3.6 266 107 16-bit x 6-ch, 32-bit x 8-ch 10-bit x 4-ch 10-bit x 2-ch Yes No 1 2025 Mar -40 to 85°C
R8A77301D266FPV#UM
Active
Pkg. Info
Env. Documentation
 SH-4A 32 0 0 16 208 3 - 3.6 266 107 16-bit x 6-ch, 32-bit x 8-ch 10-bit x 4-ch 10-bit x 2-ch Yes No 1 2025 Mar -40 to 85°C

Documentation & Downloads

Title Other Languages Type Format File Size Date
User Guides & Manuals
RX Development Environment Migration Guide Migration from SuperH Family to RX Family (IDE ed.) (High-performance Embedded Workshop to CS+) – Guide PDF 1007 KB
RH850 Development EnvironmentMigration Guide Migration from SuperH Family Compiler to RH850 Family Compiler (Building Guide) 日本語 Guide PDF 1.30 MB
RH850 Development Environment Migration Guide Migration from SuperH Family Compiler to RH850 Family Compiler (Coding / Option Guide) 日本語 Guide PDF 352 KB
SH7730 Group User's Manual: Hardware 日本語 Manual PDF 6.72 MB
Application Notes & White Papers
CAN Controller Usage: Applications and Frequently Asked Questions – Application Note PDF 1.81 MB
Compiler Package Application Note: The application guide of Call Walker 日本語 Application Note PDF 243 KB
Compiler Package Application Note: STL V.1.00.00 Lists of Supported Functions – Application Note PDF 280 KB
Compiler Package Application Note: STL V.1.00.00 User's Manual – Application Note PDF 478 KB
Perl Script to Convert S-Record Data to a C Structure 日本語, 简体中文 Application Note PDF 632 KB
Example of Using User Boot Mode of Renesas 0.18um Flash Devices with Xmodem Data Transfer – Application Note PDF 135 KB
Utility To Convert S-Record Data To A C-Structure – Application Note PDF 255 KB
Flash Memory Programming Routines – Application Note PDF 456 KB
A Sprintf Function Implementation for Smaller ROM/RAM – Application Note PDF 163 KB
SuperH C/C++ Compiler Package Application Note – Application Note PDF 5.54 MB
Serial EEPROM of HN58X25xxx Series Control Using Clock Synchronous SCI of Renesas SH – Application Note PDF 189 KB
HI Series RTOS Application Note – Application Note PDF 3.03 MB
SH7000 Series Multi-Bit Shift of 32-Bit Data (Arithmetic Right Shift) APPLICATION NOTE 日本語 Application Note PDF 183 KB
SH7000 Series Find First 1 in 32-Bit Data APPLICATION NOTE 日本語 Application Note PDF 168 KB
SH7000 Series Block Transfer (4 Bytes Not Aligned) APPLICATION NOTE – Application Note PDF 204 KB
SH7000 Series Multi-Bit Shift of 32-Bit Data (Logical Right Shift) APPLICATION NOTE 日本語 Application Note PDF 172 KB
SH7000 Series 64 Bit + 64 Bit = 64 Bit (Unsigned) APPLICATION NOTE 日本語 Application Note PDF 173 KB
SH7000 Series Block Transfer (4 Bytes Aligned) APPLICATION NOTE 日本語 Application Note PDF 206 KB
SH7000 Series Multi-Bit Shift of 32-Bit Data (Logical Left Shift) APPLICATION NOTE 日本語 Application Note PDF 171 KB
High-performance Embedded Workshop Tcl/Tk Application Note – Application Note PDF 1.43 MB
PCNs & PDNs
Unification of a JEDEC tray and a embossed carrier tape for LQFP package (Additional Information & Correction) 日本語 Product Change Notice PDF 4.86 MB
Unification of a JEDEC tray and a embossed carrier tape for LQFP package 日本語 Product Change Notice PDF 3.74 MB
Unification of a JEDEC tray and a embossed carrier tape for LQFP package 日本語 Product Change Notice PDF 1.46 MB
Downloads
- Sample codes for RX Compiler Package Application Notes: Sample Project RX Migration Guide, SuperH Edition – Sample Code ZIP 485 KB
- STL V.1.00.00 Sample Code – Sample Code ZIP 277 KB
- Renesas MCU Perl Script to Convert S-Record Data to a C Structure – Sample Code ZIP 613 KB
- タイマA動作(ワンショットタイマモード、外部トリガ) – Sample Code ZIP 391 KB
- H8 Family, H8S Family, SuperH RISC Engine Family Example of Using User Boot Mode of Renesas 0.18µm Flash Devices with Xmodem Data Transfer – Sample Code ZIP 2.25 MB
- Renesas MCU Utility To Convert S-Record Data To A C-Structure – Sample Code ZIP 303 KB
- H8 Family, H8S Family, SuperH RISC Engine Family Flash Memory Programming Routines – Sample Code ZIP 425 KB
- A Sprintf Function Implementation for Smaller ROM/RAM – Sample Code ZIP 145 KB
Other
SuperH platform brochure – Flyer PDF 2.02 MB
Smart Energy Solutions – Brochure PDF 5.42 MB
Renesas Microcomputer SuperH RISC engine Family Selection Guide 日本語 Brochure PDF 1.81 MB
Renesas Semiconductor Lead-Free Packages – Brochure PDF 1.32 MB
info: For device-specific or order-specific documentation, submit a support request.

Software / Tools

Title Type Description Company
C/C++ Compiler Package for SuperH Family Compiler/Assembler C/C++ Compiler package for SuperH RISC engine Family. Simulator debugger and High-performance Embedded Workshop included.
 Renesas
MISRA C Rule Checker SQMlint Compiler/Assembler MISRA C Rule Checker (option)
 Renesas
E10A-USB HS0005KCU01H for H-UDI Interface Emulator E10A-USB emulator not supporting AUD trace function. Renesas
E10A-USB HS0005KCU02H for AUD Trace Function Emulator E10A-USB emulator supporting AUD trace function. Renesas
Simulator Debugger for SuperH Family Simulator Simulator debugger for the SuperH RISC engine family [Support IDE : High-performance Embedded Workshop] (Note: This product is included in Compiler Package and is not available separately.)
 Renesas