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High processing performance with 1.0 GHz dual-core Arm® Cortex®-A7 CPUs, with 3D graphics and video codec engine.


RZ/G1E embedded processors are equipped with a 3D graphics engine (PowerVR SGX540 at 260 MHz) and support full high-definition video encoding and decoding, making them ideal for human-machine interface (HMI) applications.



Product Brochure and Flyer

RZ/G1 Brochure


Development Kit

RZ/G1E SK (Starter Kit) - Development and prototyping board for RZ/G1E MPU

Key Features:

Part Name

Power Supply Voltage

3.3V/1.8V(For IO), 1.5V(For DDR3), 1.03V(For CPU Core)

CPU Core

Arm® Cortex®-A7 Dual core

Maximum operating frequency

1.0 GHz

Drystone performance

3800 DMIPS 

Cache Memory

Primary cache memory: 64 KB (separated 32K instruction/32K data, TLB128 entry) Secondary cache memory: 512 KB (with CoreLink™ Level 2 Cache Controller L2C-310)
External Memory Direct connection to DDR3L-SDRAM with dedicated bus
Max. bus frequency:666MHz
Data Bus Size : 32-bit
External Extension Direct connection to Flash ROM or SRAM
Data Bus Size : 8-bit

3D Graphics


Video functions

Video display interface x 2 channels (RGB888)
Video input interface x 2 channels
Video codec module VCP3
IP translate module
Video image processing function (Color transformation, Image enlargement/Image reduction, Filtering) 

Audio functions

Sampling rate change x 6 channels
Serial Sound Interface x 10 channels

Storage interfaces

USB 2.0 Host interface x 2 ports (wPHY)
SD Host Interface x 3 channels (Support SDXC, UHS-I function)
Multimedia Card Interface x 1 channel
Timer Function 32-bit Timer x 12 channels
PWM Timer x 7 channels
Connectivity functions I²C Bus Interface × 8 channels
Serial Communication Interface (SCIF) x 15 channels
Quad Serial Peripheral Interface (QSPI) x 1 channel (Support boot function)
Clocked Serial Interface (MSIOF) x 3 channels (Support SPI/IIS)
Ethernet AVB Controller(IEEE802.1BA, 802.1AS, 802.1Qav and IEEE1722 compliance, GMII/MII Interface, Connectable PHY devices)
Ethernet Controller (Built-in MAC compliant IEEE802.3u, RMII interface, Connectable PHY devices)
CAN Interface x 2 channels
Other functions DMAC in LBSC x 3 channels, SYS-DMAC x 30 channels, Audio-DMAC x 13 channels, Audio (peripheral)-DMAC x 29 channels,
Interrupt Controller
Clock Generator (CPG) : Built-in PLL
On-chip debug function


Pin count /Memory size Lineup:



Block Diagram:


*Arm, Cortex and CoreLink are registered trademarks or trademarks of Arm Limited.

Below you will find information to support the development of your application.


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e-learning Information for studying and learning about microcontrollers and microprocessors.
FAQ Frequently asked questions and useful hints for development.
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Boards and Software Solutions

Title Description
Board Information RZ/G1E Starter Kit (Type name:YR8A77450S000BE)
Linux Solution
  Linux BSP
U-Boot, Kernel, and root file system are provided by using the Yocto Project.
Kernel version:LTSI-3.10
BSP for RZ/G1E Starter Kit
Linux Solution
  Multimedia Package
OpenGL ES2.0(Graphics library)
H.264 encoder/decoder
Related Linux drivers related Linux drivers





RZ/G Linux Platform

Renesas offers "RZ/G Linux Platform" as system platform which is systematically organized Linux OS environment.



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