Features
- Traditional 8 OE# pins allow hardware control of 8 outputs and 20 SMBus bits allow software control of each output
- Simple 3-wire Side-Band Interface allows real-time control of all 20 outputs
- Outputs remain Low/Low when powered up with a floating input clock
- Low-Power HCSL (LP-HCSL) outputs reduce device power consumption by 50%
- Zo = 85Ω outputs eliminate 80 resistors, saving 130mm2 of area
- 9 selectable SMBus addresses
- Spread spectrum compatible
- 6mm × 6mm dual-row 80-GQFN
Description
The 9QXL2001B is a 20-output very-low-additive phase jitter fanout buffer for PCIe Gen 4, Gen 5, and UPI applications. The 9QXL2001B provides two methods to control output enables; standard OE# pins and SMBus enable bits, or a simple 3-wire serial interface that is independent of the SMBus. The OE Control Mode is set via a hardware strap. It offers integrated terminations for 85Ω transmission lines.
Parameters
| Attributes | Value |
|---|---|
| Diff. Outputs | 20 |
| Diff. Output Signaling | LP-HCSL |
| Output Freq Range (MHz) | 1 - 400 |
| Diff. Inputs | 1 |
| Diff. Input Signaling | HCSL |
| Accepts Spread Spec Input | Yes |
| Power Consumption Typ (mW) | 488 |
| Supply Voltage (V) | 3.3 - 3.3 |
| Output Type | LP-HCSL |
| Diff. Termination Resistors | 24 |
| Package Area (mm²) | 81 |
| Battery Backup | No |
| Battery Seal | No |
| CPU Supervisory Function POR | No |
| Crystal Frequency Trimming | No |
| Frequency Out Pin | No |
| Inputs (#) | 1 |
| Input Freq (MHz) | 1 - 400 |
| Function | Fanout Buffer |
| Input Type | HCSL |
| Output Banks (#) | 1 |
| Core Voltage (V) | 3.3 |
| Output Voltage (V) | 0.7 |
| Product Category | PCI Express Clocks, Processor Clock Buffers, Zero Delay Buffers |
Package Options
| Pkg. Type | Pkg. Dimensions (mm) | Lead Count (#) | Pitch (mm) |
|---|---|---|---|
| VFQFPN | 6.0 x 6.0 x 0.85 | 80 | 0.5 |
Applications
- Servers
- Storage
- Networking
- Accelerators