概要

The 650-07 is a low cost, low jitter, high performance clock synthesizer for networking applications. Using analog Phase-Locked Loop (PLL) techniques, the device accepts a 12.5 MHz or 25.00 MHz clock or fundamental mode crystal input to produce multiple output clocks for networking chips, PCI devices, SDRAM, and ASICs. The 650-07 outputs all have 0 ppm synthesis error.

ドキュメント

設計・開発

ECADモデル

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ECADモデルを調べる
Diagram of ECAD Models

製品選択

    Processing table
    Pkg. Type
    Lead Count (#)
    Temp. Grade
    Pb (Lead) Free
    Carrier Type
    ご購入 / サンプル
    型名
    650R-07ILF
    circle廃止品
    memory
    view_in_ar
    		QSOP 20 I Yes Tube
    650R-07ILFT
    circle廃止品
    memory
    view_in_ar
    		QSOP 20 I Yes Reel
    650R-07LF
    circle廃止品
    memory
    view_in_ar
    		QSOP 20 C Yes Tube
    650R-07LFT
    circle廃止品
    memory
    view_in_ar
    		QSOP 20 C Yes Reel
    Parametric Table tips

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    • Cart icon to the right of the chip icon: Indicates that samples are available for this product