特長
- One LVPECL output pair
- Two selectable differential LVPECL clock inputs
- PCLKx, nPCLKx pairs can accept the following differential input levels: LVPECL, LVDS
- Translates LVCMOS/LVTTL input signals to LVPECL levels by using a resistor bias network on nPCLKx, nPCLKx
- Part-to-part skew: 150ps (maximum)
- Propagation delay: 490ps (maximum)
- Full 3.3V or 2.5V operating supply
- -40°C to 85°C ambient operating temperature
- Available in lead-free (RoHS 6) packages
説明
The 853S01I is a high performance 2:1 Differential-to-LVPECL Multiplexer. The 853S01I can also perform differential translation because the differential inputs accept LVPECL and LVDS levels. The 853S01I is packaged in a small 3mm x 3mm 16 VFQFN package, making it ideal for use on space constrained boards.
パラメータ
| 属性 | 値 |
|---|---|
| Function | Multiplexer |
| Outputs (#) | 1 |
| Output Type | LVPECL |
| Output Freq Range (MHz) | - |
| Input Freq (MHz) | - |
| Inputs (#) | 2 |
| Input Type | LVDS, LVPECL |
| Output Banks (#) | 1 |
| Core Voltage (V) | 2.5, 3.3 |
| Output Voltage (V) | 2.5, 3.3 |
| Additive Phase Jitter Typ RMS (fs) | 24 |