特長
- Standards compliant with DisplayPort v1.1a and EDID v1.4
- 1 and 2 lane input option, up to WUXGA@60Hz resolution
- 6-bit 6 pair and 8-bit 6 pair mini-LVDS output
- Dual or single bus mini-LVDS output
- Output clock frequency up to 200MHz
- Advanced design for test for additional reliability
- Low voltage power supply
- 100pin TQFP package
Obsolete Part
説明
The VPP1603 is a general purpose timing controller with integrated DisplayPort receiver. Featuring low power consumption, VPP1603 is designed to drive mini-LVDS column drivers of notebook LCD panels that support a DisplayPort link.
