パッケージ情報
| CADモデル: | View CAD Model |
| Pkg. Type: | CLCC |
| Pkg. Code: | JSE |
| Lead Count (#): | 8 |
| Pkg. Dimensions (mm): | 6.0 x 6.0 x 1.78 |
| Pitch (mm): | 1.4 |
環境及び輸出分類情報
| Moisture Sensitivity Level (MSL) | Not Applicable |
| Pb (Lead) Free | Exempt |
| ECCN (US) | 9A515.e.1 |
| HTS (US) | 8542.39.0090 |
製品スペック
| Lead Count (#) | 8 |
| Carrier Type | Tray |
| Moisture Sensitivity Level (MSL) | Not Applicable |
| Pitch (mm) | 1.4 |
| Pkg. Dimensions (mm) | 6.0 x 6.0 x 1.78 |
| Qualification Level | EM |
| Pb (Lead) Free | Exempt |
| Pb Free Category | Gold Plate over compliant Undercoat-e4 |
| MOQ | 1 |
| Temp. Range (°C) | -55 to +125°C |
| CAGE code | 34371 |
| DSEE (MeV·cm2/mg) | 86 |
| Die Sale Availability? | Yes |
| Driver Type | Low Side |
| Drivers (#) | 1 |
| FET Type | GaNFET |
| Fall Time | 7.5 |
| Flow | RH Hermetic |
| Gate Drive (V) | 4.5 |
| Input VCC (Max) (V) | 13.2 |
| Input VCC (Min) (V) | 4.5 |
| Length (mm) | 6 |
| Low Side Fall Time (max) (ns) | 50 |
| Low Side Rise Time (max) (ns) | 90 |
| Models Available | PSPICE, ISIM |
| Output Type | Inverting/Non-inverting |
| PROTO Availability? | Yes |
| Peak Output Sink Current (A) | 2.8 |
| Peak Output Source Current (A) | 1.5 |
| Peak Sink Current (A) | 4 |
| Peak Source Current (A) | 3 |
| Pkg. Type | CLCC |
| Rating | Space |
| Rise Time (Max) | 12.5 |
| SMD URL | 5962-17233 |
| Supply Voltage (V) | 4.5 - 13.2 |
| TID HDR (krad(Si)) | 100 |
| TID LDR (krad(Si)) | 75 |
| Thickness (mm) | 1.78 |
| Turn-On Prop Delay (ns) | 40 |
| Width (mm) | 6 |
ISL70040SEH に関するリソース
説明
The ISL70040SEH is a low-side driver designed to drive enhancement mode Gallium Nitride (GaN) FETs in isolated topologies and boost-type configurations. The ISL70040SEH operates with a supply voltage from 4.5V to 13.2V and has both inverting (INB) and non-inverting (IN) inputs to satisfy requirements for inverting and non-inverting gate drives with a single device. The ISL70040SEH has a 4.5V gate drive voltage (VDRV) generated using an internal regulator, which prevents the gate voltage from exceeding the maximum gate-source rating of enhancement mode GaN FETs. The gate drive voltage also features an undervoltage lockout (UVLO) protection that ignores the inputs (IN/INB) and keeps OUTL turned on to ensure the GaN FET is in an OFF state whenever VDRV is below the UVLO threshold. The ISL70040SEH's input can withstand voltages up to 14.7V regardless of the VDD voltage. This allows the inputs to be connected directly to most PWM controllers. The device's split outputs offer the flexibility to adjust the turn-on and turn-off speed independently by adding additional impedance to the turn-on/off paths. The ISL70040SEH operates across the military temperature range from -55°C to +125°C and is offered in an 8 Ld hermetically sealed ceramic Surface Mount Device (SMD) package or die form.