パッケージ情報
| CADモデル: | View CAD Model |
| Pkg. Type: | VFQFPN |
| Pkg. Code: | NHG80 |
| Lead Count (#): | 80 |
| Pkg. Dimensions (mm): | 6.0 x 6.0 x 0.85 |
| Pitch (mm): | 0.5 |
環境及び輸出分類情報
| Moisture Sensitivity Level (MSL) | 3 |
| Pb (Lead) Free | Yes |
| ECCN (US) | EAR99 |
| HTS (US) | 8542.39.0090 |
製品スペック
| Lead Count (#) | 80 |
| Carrier Type | Reel |
| Moisture Sensitivity Level (MSL) | 3 |
| App Jitter Compliance | PCIe Gen1, PCIe Gen2, PCIe Gen3, PCIe Gen4, QPI, UPI, 25G EDR, DB2000Q, PCIe Gen5 |
| Qty. per Reel (#) | 4000 |
| Qty. per Carrier (#) | 0 |
| Pb (Lead) Free | Yes |
| Pb Free Category | e4 NiPdAu |
| Temp. Range (°C) | -40 to 85°C |
| Country of Assembly | TAIWAN |
| Country of Wafer Fabrication | TAIWAN |
| Accepts Spread Spec Input | Yes |
| Advanced Features | Multiple SMBus addresses |
| Architecture | Common, SRIS, SRNS |
| C-C Jitter Max P-P (ps) | 50 |
| Chipset Manufacturer | Intel |
| Chipset Name | C600, Patsburg, Wellsburg, Lewisburg |
| Clock Spec. | DB1900Z v1.7 Derivative |
| Core Voltage (V) | 3.3V |
| Diff. Input Signaling | HCSL |
| Diff. Inputs | 1 |
| Diff. Output Signaling | LP-HCSL |
| Diff. Outputs | 19 |
| Diff. Termination Resistors | 0 |
| Feedback Input | No |
| Function | Zero Delay Buffer |
| Input Freq (MHz) | 33 - 150 |
| Input Type | HCSL |
| Inputs (#) | 1 |
| Length (mm) | 6 |
| MOQ | 4000 |
| Output Banks (#) | 1 |
| Output Enable (OE) Pins | 8 |
| Output Freq Range (MHz) | 1 - 400 |
| Output Impedance | 85 |
| Output Skew (ps) | 85 |
| Output Type | LP-HCSL |
| Output Voltage (V) | 0.7V |
| Outputs (#) | 19 |
| PLL | Yes |
| Package Area (mm²) | 100 |
| Pitch (mm) | 0.5 |
| Pkg. Dimensions (mm) | 6.0 x 6.0 x 0.85 |
| Pkg. Type | VFQFPN |
| Power Consumption Typ (mW) | 712 |
| Product Category | PCI Express Clocks, Processor Clock Buffers, Zero Delay Buffers |
| Prog. Clock | Yes |
| Prog. Interface | SMBUS |
| Reel Size (in) | 13 |
| Reference Output | No |
| Spread Spectrum | Yes |
| Supply Voltage (V) | 3.3 - 3.3 |
| Tape & Reel | Yes |
| Thickness (mm) | 0.85 |
| Width (mm) | 6 |
9ZXL1951D に関するリソース
説明
The 9ZXL1951D is a second-generation, enhanced performance DB1900ZL derivative buffer. The part is a pin-compatible upgrade to the 9ZXL1951A, offering a much improved phase jitter performance. It has 8 OE# pins that can be configured via SMBus to control up to 16 of the device's 19 outputs, and is packaged in a 6 x 6 mm QFN package for maximum space savings. A fixed external feedback maintains low drift for critical QPI/UPI applications.