パッケージ情報
| CADモデル: | View CAD Model |
| Pkg. Type: | VFQFPN |
| Pkg. Code: | NLG32 |
| Lead Count (#): | 32 |
| Pkg. Dimensions (mm): | 5.0 x 5.0 x 0.9 |
| Pitch (mm): | 0.5 |
環境及び輸出分類情報
| Moisture Sensitivity Level (MSL) | 3 |
| Pb (Lead) Free | Yes |
| ECCN (US) | EAR99 |
| HTS (US) | 8542.39.0090 |
製品スペック
| Lead Count (#) | 32 |
| Carrier Type | Tray |
| Moisture Sensitivity Level (MSL) | 3 |
| Qty. per Reel (#) | 0 |
| Qty. per Carrier (#) | 490 |
| Pb (Lead) Free | Yes |
| Pb Free Category | e3 Sn |
| Temp. Range (°C) | -40 to 85°C |
| Accepts Spread Spec Input | Yes |
| Advanced Features | Reference Output |
| App Jitter Compliance | PCIe Gen1, PCIe Gen2, PCIe Gen3 |
| Architecture | Common |
| C-C Jitter Max P-P (ps) | 36 |
| Core Voltage (V) | 3.3 |
| Diff. Output Signaling | HCSL |
| Diff. Outputs | 5 |
| Diff. Termination Resistors | 4 |
| Input Freq (MHz) | 25 - 25 |
| Input Type | Crystal, HCSL, HSTL, LVDS, LVPECL |
| Inputs (#) | 2 |
| Length (mm) | 5 |
| MOQ | 490 |
| Output Freq Range (MHz) | 25 - 25, 100 - 100 |
| Output Skew (ps) | 50 |
| Output Type | HCSL |
| Output Voltage (V) | 3.3 |
| Outputs (#) | 5 |
| PLL | Yes |
| Package Area (mm²) | 25 |
| Period Jitter Max P-P (ps) | 2.6 |
| Period Jitter Typ P-P (ps) | 2.1 |
| Phase Jitter Max RMS (ps) | 0.63 |
| Phase Jitter Typ RMS (ps) | 0.43 |
| Pitch (mm) | 0.5 |
| Pkg. Dimensions (mm) | 5.0 x 5.0 x 0.9 |
| Pkg. Type | VFQFPN |
| Power Consumption Typ (mW) | 343 |
| Product Category | PCI Express Clocks |
| Prog. Clock | No |
| Reference Output | Yes |
| Requires Terms and Conditions | Does not require acceptance of Terms and Conditions |
| Spread Spectrum | Yes |
| Supply Voltage (V) | 3.3 - 3.3 |
| Tape & Reel | No |
| Thickness (mm) | 0.9 |
| Width (mm) | 5 |
| Xtal Freq (MHz) | 25 - 25 |
8V41S104I に関するリソース
説明
The 8V41S104I is a PLL-based clock generator specifically designed for PCI Express® Generation 3 applications. This device generates a 100MHz differential HCSL clock from an input reference of 25MHz. The input reference may be derived from an external source or by the addition of a 25MHz crystal to the on-chip crystal oscillator. The device offers spread spectrum clock output for reduced EMI applications. The spread spectrum control pins are used to enable or disable spread spectrum operation, as well as selecting either a down spread value of -0.35% or -0.5%. The enable and disable for each of the outputs is controlled via individual output enable pins. The 8V41S104I is packaged in a compact, lead-free (RoHS 6) 32-lead VFQFN package. The industrial temperature range supports high-end computing, telecommunication, and networking end equipment requirements.
