パッケージ情報
| CADモデル: | View CAD Model |
| Pkg. Type: | TSSOP |
| Pkg. Code: | PGG20 |
| Lead Count (#): | 20 |
| Pkg. Dimensions (mm): | 6.5 x 4.4 x 1.0 |
| Pitch (mm): | 0.65 |
環境及び輸出分類情報
| Moisture Sensitivity Level (MSL) | 1 |
| Pb (Lead) Free | Yes |
| ECCN (US) | EAR99 |
| HTS (US) | 8542.39.0090 |
製品スペック
| Lead Count (#) | 20 |
| Carrier Type | Reel |
| Moisture Sensitivity Level (MSL) | 1 |
| Qty. per Reel (#) | 3000 |
| Qty. per Carrier (#) | 0 |
| Pb (Lead) Free | Yes |
| Pb Free Category | e3 Sn |
| Temp. Range (°C) | 0 to 70°C |
| Additive Phase Jitter Typ RMS (fs) | 40 |
| Additive Phase Jitter Typ RMS (ps) | 0.04 |
| Core Voltage (V) | 3.3 |
| Divider Value | 1, 2 |
| Function | Buffer, Multiplexer, Divider |
| Input Freq (MHz) | 650 |
| Input Type | CML, HCSL, HSTL, LVDS, LVPECL, SSTL |
| Inputs (#) | 2 |
| Length (mm) | 6.5 |
| MOQ | 3000 |
| Output Banks (#) | 2 |
| Output Freq Range (MHz) | 650 |
| Output Skew (ps) | 60 |
| Output Type | LVPECL |
| Output Voltage (V) | 3.3 |
| Outputs (#) | 4 |
| Package Area (mm²) | 28.6 |
| Pitch (mm) | 0.65 |
| Pkg. Dimensions (mm) | 6.5 x 4.4 x 1.0 |
| Pkg. Type | TSSOP |
| Product Category | Clock Buffers & Drivers, Clock Dividers, Clock Multiplexers |
| Reel Size (in) | 13 |
| Requires Terms and Conditions | Does not require acceptance of Terms and Conditions |
| Tape & Reel | Yes |
| Thickness (mm) | 1 |
| Width (mm) | 4.4 |
8737-11 に関するリソース
説明
The 8737-11 is a low skew, high performance Differential-to-3.3V LVPECL Clock Generator/Divider. The 8737-11 has two selectable clock inputs. The CLK, nCLK pair can accept most standard differential input levels. The PCLK, nPCLK pair can accept LVPECL, CML, or SSTL input levels. The clock enable is internally synchronized to eliminate runt pulses on the outputs during asynchronous assertion/deassertion of the clock enable pin. Guaranteed output and part-to-part skew characteristics make the 8737-11 ideal for clock distribution applications demanding well defined performance and repeatability.