パッケージ情報
| CADモデル: | View CAD Model |
| Pkg. Type: | TSSOP |
| Pkg. Code: | PGG16 |
| Lead Count (#): | 16 |
| Pkg. Dimensions (mm): | 5.0 x 4.4 x 1.0 |
| Pitch (mm): | 0.65 |
環境及び輸出分類情報
| Moisture Sensitivity Level (MSL) | 1 |
| Pb (Lead) Free | Yes |
| ECCN (US) | EAR99 |
| HTS (US) | 8542.39.0090 |
製品スペック
| Lead Count (#) | 16 |
| Carrier Type | Reel |
| Moisture Sensitivity Level (MSL) | 1 |
| Qty. per Reel (#) | 2500 |
| Qty. per Carrier (#) | 0 |
| Pb (Lead) Free | Yes |
| Pb Free Category | e3 Sn |
| Temp. Range (°C) | 0 to 70°C |
| C-C Jitter Max P-P (ps) | 65 |
| C-C Jitter Typ P-P (ps) | 50 |
| Core Voltage (V) | 3.3V, 2.5V |
| Divider Value | 4, 8 |
| Input Freq (MHz) | 15.625 - 62.5 |
| Input Type | LVCMOS |
| Inputs (#) | 1 |
| Length (mm) | 5 |
| MOQ | 2500 |
| Output Banks (#) | 1 |
| Output Freq Range (MHz) | 15.625 - 62.5 |
| Output Signaling | LVCMOS |
| Output Skew (ps) | 65 |
| Output Type | LVCMOS |
| Output Voltage (V) | 3.3V, 2.5V |
| Outputs (#) | 3 |
| Package Area (mm²) | 22 |
| Pitch (mm) | 0.65 |
| Pkg. Dimensions (mm) | 5.0 x 4.4 x 1.0 |
| Pkg. Type | TSSOP |
| Product Category | Zero Delay Buffers |
| Reel Size (in) | 13 |
| Requires Terms and Conditions | Does not require acceptance of Terms and Conditions |
| Tape & Reel | Yes |
| Thickness (mm) | 1 |
| Width (mm) | 4.4 |
86004 に関するリソース
説明
The 86004 is a high performance 1:4 LVCMOS/LVTTL Clock Buffer. The 86004 has a fully integrated PLL and can be configured as zero delay buffer and has an input and output frequency range of 15.625MHz to 62.5MHz. The VCO operates at a frequency range of 250MHz to 500MHz. The external feedback allows the device to achieve "zero delay" between the input clock and the output clocks. The PLL_SEL pin can be used to bypass the PLL for system test and debug purposes. In bypass mode, the reference clock is routed around the PLL and into the internal output divider.