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Low Skew,1-to-5 Differential-to-2.5V,3.3V LVPECL Fanout Buffer

パッケージ情報

CADモデル: View CAD Model
Pkg. Type: TSSOP
Pkg. Code: PGG20
Lead Count (#): 20
Pkg. Dimensions (mm): 6.5 x 4.4 x 1.0
Pitch (mm): 0.65

環境及び輸出分類情報

Moisture Sensitivity Level (MSL) 1
Pb (Lead) Free Yes
ECCN (US) EAR99
HTS (US) 8542.39.0090

製品スペック

Lead Count (#) 20
Carrier Type Tube
Moisture Sensitivity Level (MSL) 1
Qty. per Reel (#) 0
Qty. per Carrier (#) 74
Package Area (mm²) 28.6
Pitch (mm) 0.65
Pkg. Dimensions (mm) 6.5 x 4.4 x 1.0
Pb (Lead) Free Yes
Pb Free Category e3 Sn
Temp. Range (°C) -40 to 85°C
Additive Phase Jitter Typ RMS (fs) 60
Additive Phase Jitter Typ RMS (ps) 0.06
Core Voltage (V) 2.5V, 3.3V
Function Buffer, Multiplexer
Input Freq (MHz) 700
Input Type HCSL, HSTL, LVDS, LVPECL, SSTL
Inputs (#) 2
Length (mm) 6.5
MOQ 74
Output Banks (#) 1
Output Freq Range (MHz) 700
Output Skew (ps) 30
Output Type LVPECL
Output Voltage (V) 2.5V, 3.3V
Outputs (#) 5
Pkg. Type TSSOP
Requires Terms and Conditions Does not require acceptance of Terms and Conditions
Tape & Reel No
Thickness (mm) 1
Width (mm) 4.4
掲載 No

説明

The 85314I-11 is a low skew, high performance 1-to-5 Differential-to-2.5V/3.3V LVPECL fanout buffer. The 85314I-11 has two selectable differential clock inputs. The CLK0, nCLK0 and CLK1, nCLK1 pairs can accept most standard differential input levels. The clock enable is internally synchronized to eliminate runt clock pulses on the outputs during asynchronous assertion/deassertion of the clock enable pin. Guaranteed output and part-to-part skew characteristics make the 85314I-11 ideal for those applications demanding well defined performance and repeatability.