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ルネサス エレクトロニクス株式会社 (Renesas Electronics Corporation)
Low Skew,1-to-5 Differential-to-3.3V LVPECL Fanout Buffer

パッケージ情報

CADモデル:View CAD Model
Pkg. Type:TSSOP
Pkg. Code:PGG20
Lead Count (#):20
Pkg. Dimensions (mm):6.5 x 4.4 x 1.0
Pitch (mm):0.65

環境及び輸出分類情報

Moisture Sensitivity Level (MSL)1
Pb (Lead) FreeYes
ECCN (US)EAR99
HTS (US)8542.39.0090

製品スペック

Lead Count (#)20
Carrier TypeReel
Moisture Sensitivity Level (MSL)1
Qty. per Reel (#)3000
Qty. per Carrier (#)0
Pb (Lead) FreeYes
Pb Free Categorye3 Sn
Temp. Range (°C)-40 to 85°C
Core Voltage (V)3.3
FunctionBuffer, Multiplexer
Input Freq (MHz)650
Input TypeHCSL, HSTL, LVDS, LVPECL, SSTL
Inputs (#)2
Length (mm)6.5
MOQ3000
Output Banks (#)1
Output Freq Range (MHz)650
Output Skew (ps)35
Output TypeLVPECL
Output Voltage (V)3.3
Outputs (#)5
Package Area (mm²)28.6
Pitch (mm)0.65
Pkg. Dimensions (mm)6.5 x 4.4 x 1.0
Pkg. TypeTSSOP
Product CategoryClock Buffers & Drivers, Clock Multiplexers
Reel Size (in)13
Requires Terms and ConditionsDoes not require acceptance of Terms and Conditions
Tape & ReelYes
Thickness (mm)1
Width (mm)4.4
掲載No

説明

The ICS85304I-01 is a low-skew, high-performance 1-to-5 differential-to-3.3V LVPECL fanout buffer. The ICS85304I-01 has two selectable clock inputs. The CLKx, nCLKx pairs can accept most standard differential input levels. The clock enable is internally synchronized to eliminate runt clock pulses on the outputs during asynchronous assertion/de-assertion of the clock enable pin.

Guaranteed output and part-to-part skew characteristics make the ICS85304I-01 ideal for those applications demanding well-defined performance and repeatability.