特長
- Two differential HCSL output pairs
- Two selectable differential clock input pairs
- CLKx, nCLKx pairs can accept HCSL level inputs
- Low level input detection on selected input (latched)
- Maximum Input frequency : 250MHz
- Output skew: 5ps (typical)
- Propagation delay: 1.4ns (typical)
- Additive RMS phase jitter at 133.33MHz (12kHz - 20MHz): 0.151ps (typical)
- Full 3.3V operating supply
- -40°C to 85°C ambient operating temperature
- Available in lead-free (RoHS 6) packages
851S201I - Block Diagram
説明
The 851S201I is a high performance 2:2 Differential-to-HCSL Multiplexer with a 2 output fanout buffer. The 851S201I operates up to 250MHz and accepts HCSL and other low level differential inputs levels. Input level detection circuitry is available to flag input levels that drops below a specified value and on the selected input. This signal is latched until the status is reset via the alarm reset input. The 851S201I is packaged in a small 3 x 3 mm 16 lead VFQFN package, making it ideal for use on space constrained boards.
