特長
- Four LVPECL output pairs
- Crystal oscillator interface: 25MHz
- Differential PCLK/nPCLK input pair
- PCLK/nPCLK supports the following input types: LVPECL, CML, SSTL
- Output frequency: 133.33MHz
- PCI Express (2.5 Gb/s) and Gen 2 (5 Gb/S) jitter compliant
- RMS phase jitter @ 133.33MHz (12kHz - 20MHz): 1.2ps (typical)
- I2C support with readback capabilities up to 400kHz
- Spread Spectrum for electromagnetic interference (EMI) reduction
- 3.3V operating supply mode
- -40°C to 85°C ambient operating temperature
- Available lead-free (RoHS 6) package
843S104I-133 - Block Diagram
説明
The 843S104I-133 is a PLL-based clock synthesizer specifically designed for low phase noise applications. This device generates a 133.33MHz differential LVPECL clock from an input reference of 25MHz. The input reference may be derived from an external source or by the addition of a 25MHz crystal to the on-chip crystal oscillator. An external reference is applied to the PCLK, nPCLK pins.The device offers spread spectrum clock output for reduced EMI applications. An I2C bus interface is used to enable or disable spread spectrum operation as well as to select either a down spread value of -0.35% or -0.5%.The 843S104I-133 is available in a lead-free 32-Lead VFQFN package.
