特長
- Three 3.3V LVPECL outputs on two banks, A Bank with one LVPECL pair and B Bank with 2 LVPECL output pairs
- Using a 25MHz or 26.041666 crystal, the two output banks can be independently set for 625MHz, 312.5MHz, 156.25MHz, or 125MHz
- Selectable crystal oscillator interface or LVCMOS/LVTTL single-ended input
- VCO range: 520MHz to 680MHz
- RMS phase jitter at 156.25MHz (1.875MHz to 20MHz): 0.3ps (typical)
- Full 3.3V supply mode
- 0 °C to 70 °C ambient operating temperature
- Available in a lead-free (RoHS 6) package
説明
The 8433625 is a 3 differential output LVPECL synthesizer designed to generate Ethernet reference clock frequencies. Using a 25MHz or 26.041666MHz, 18pF parallel resonant crystal, the following frequencies can be generated based on the settings of 4 frequency select pins (DIV_SELA[1:0], DIV_SELB[1:0]): 625MHz, 312.5MHz, 156.25MHz, and 125MHz. The 8433625 has 2 output banks, Bank A with 1 differential LVPECL output pair and Bank B with 2 differential LVPECL output pairs. The two banks have their own dedicated frequency select pins and can be independently set for the frequencies mentioned above. The 8433625 uses Renesas' third generation of low phase noise VCO technology and can achieve 1ps or lower typical RMS phase jitter, easily meeting Ethernet jitter requirements. The 8433625 is packaged in a small 24-pin TSSOP package.
