特長
- Two 0.7V differential HCSL outputs (Bank A), configurable for PCIe (100MHz or 250MHz) and sRIO (100MHz or 125MHz) clock signals Eight LVCMOS/LVTTL outputs (Banks B/C), 18? typical output impedance Two REF_OUT LVCMOS/LVTTL clock outputs, 23? typical output impedance
- Selectable crystal oscillator interface, 25MHz, 18pF parallel resonant crystal or one LVCMOS/LVTTL single-ended reference clock input
- Supports the following output frequencies: HCSL Bank A: 100MHz, 125MHz, 200MHz and 250MHz LVCMOS/LVTTL Bank B/C: 33.33MHz, 50MHz, 66.67MHz, 100MHz, 125MHz, 133.33MHz, 166.67MHz and 200MHz
- VCO: 2GHz
- Spread spectrum clock: ±0.25% center-spread (typical) and -0.6% down-spread (typical)
- PLL bypass and output enable
- RMS period jitter: 10ps (typical), QAx/nQAx outputs
- Full 3.3V supply mode
- -40°C to 85°C ambient operating temperature
- Available in lead-free (RoHS 6) package
説明
The 841S012DI is an optimized PCIe, sRIO and Gigabit Ethernet Frequency Synthesizer and a member of family of high performance clock solutions from IDT. The 841S012DI uses a 25MHz parallel resonant crystal to generate 33.33MHz - 200MHz clock signals, replacing multiple oscillators and fanout buffer solutions. The device supports ±0.25% center-spread, and -0.5% down-spread clocking with two spread select pins (SSC[1:0]). The VCO operates at a frequency of 2GHz. The device has three output banks: Bank A with two 100MHz – 250MHz HCSL outputs; Bank B with seven 33.33MHz – 200MHz LVCMOS/ LVTTL outputs; and Bank C with one 33.33MHz – 200MHz LVCMOS/LVTTL output.
All Banks A, B and C have their own dedicated frequency select pins and can be independently set for the frequencies mentioned above. The low jitter characteristic of the 841S012DI makes it an ideal clock source for PCIe, sRIO and Gigabit Ethernet applications. Designed for networking and industrial applications, the 841S012DI can also drive the high-speed clock inputs of communication processors, DSPs, switches and bridges.
