パッケージ情報
| CADモデル: | View CAD Model |
| Pkg. Type: | VFQFPN |
| Pkg. Code: | NLG72 |
| Lead Count (#): | 72 |
| Pkg. Dimensions (mm): | 10.0 x 10.0 x 1.0 |
| Pitch (mm): | 0.5 |
環境及び輸出分類情報
| Moisture Sensitivity Level (MSL) | 3 |
| Pb (Lead) Free | Yes |
| ECCN (US) | EAR99 |
| HTS (US) | 8542.39.0090 |
製品スペック
| Lead Count (#) | 72 |
| Carrier Type | Tray |
| Moisture Sensitivity Level (MSL) | 3 |
| Qty. per Reel (#) | 0 |
| Qty. per Carrier (#) | 168 |
| Pb (Lead) Free | Yes |
| Pb Free Category | e3 Sn |
| Temp. Range (°C) | -40 to 85°C |
| 100M Non-SSC Outputs | 10 |
| 100M SSC Outputs | 0 |
| 25M Outputs | 2 |
| Advanced Features | Programmable Clock, 25M output(s), 50M output(s), 100M output(s), 125M output(s) |
| App Jitter Compliance | PCIe Gen1, PCIe Gen2, PCIe Gen3, XAUI |
| Chipset Manufacturer | Cavium |
| Clock Spec. | Cavium: Period Jitter < 70 ps |
| Core Voltage (V) | 3.3V |
| Diff. Termination Resistors | 40 |
| Feedback Input | No |
| Function | Generator |
| Input Freq (MHz) | 25 - 25 |
| Input Type | Crystal, LVCMOS, LVTTL |
| Inputs (#) | 2 |
| Lead Compliant | No |
| Length (mm) | 10 |
| MOQ | 168 |
| Output Banks (#) | 8 |
| Output Freq Range (MHz) | 100 - 100, 125 - 125, 156.25 - 156.25, 312.5 - 312.5 |
| Output Type | LVCMOS, HCSL |
| Output Voltage (V) | 2.5V, 3.3V |
| Outputs (#) | 14 |
| PCI 33.33M Outputs (#) | 0 |
| Package Area (mm²) | 100 |
| Period Jitter Max P-P (ps) | 90 |
| Period Jitter Typ P-P (ps) | 43.3 |
| Phase Jitter Max RMS (ps) | 0.96 |
| Phase Jitter Typ RMS (ps) | 0.64 |
| Pitch (mm) | 0.5 |
| Pkg. Dimensions (mm) | 10.0 x 10.0 x 1.0 |
| Pkg. Type | VFQFPN |
| Power Consumption Typ (mW) | 901 |
| Prog. Clock | No |
| Reference Output | Yes |
| Requires Terms and Conditions | Does not require acceptance of Terms and Conditions |
| Spread Spectrum | No |
| Supply Voltage (V) | 3.3 - 3.3 |
| Tape & Reel | No |
| Thickness (mm) | 1 |
| Width (mm) | 10 |
| Xtal Freq (KHz) | 25 - 25 |
| Xtal Freq (MHz) | 25 - 25 |
| Xtal Inputs (#) | 1 |
| 掲載 | No |
8413S12I-100 に関するリソース
説明
The 8413S12I-100 is a PLL-based clock generator specifically designed for Cavium Networks Octeon II processors. This high-performance device is optimized to generate the processor core reference clock, the PCI Express reference clocks, and the clocks for both the Gigabit Ethernet MAC and PHY. The clock generator offers ultra-low jitter, low-skew clock outputs, and edge rates that easily meet the input requirements for the CN63XX and CN68XX series of processors. The output frequencies are generated from a 25MHz external input source or an external 25MHz parallel resonant crystal. The industrial temperature range of the 8413S12I-100 supports telecommunication, networking, and storage requirements.