特長
- Twelve LVCMOS outputs
- Selectable LVCMOS clock or differential CLK, nCLK inputs
- CLK, nCLK pair can accept the following differential input levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL
- LVCMOS_CLK accepts the following input levels: LVCMOS or LVTTL
- Maximum output frequency: 150MHz
- Output skew: 350ps (maximum)
- Part to part skew: 1.5ns (maximum)
- 3.3V core, 3.3V output
- -40°C to 85°C ambient operating temperature
- Available in lead-free (RoHS 6) package
説明
The 83948I-01 is a low skew, 1-to-12 Differential-to- LVCMOS Fanout Buffer. The 83948I-01 has two selectable clock inputs. The CLK, nCLK pair can accept most standard differential input levels. The LVCMOS_CLK can accept LVCMOS or LVTTL input levels. The low impedance LVCMOS outputs are designed to drive 50Ω series or parallel terminated transmission lines. The effective fanout can be increased from 12 to 24 by utilizing the ability of the outputs to drive two series terminated lines. The 83948I-01 is characterized at 3.3V core/3.3V output. Guaranteed output and part-to-part skew characteristics make the 83948I-01 ideal for those clock distribution applications demanding well defined performance and repeatability.