パッケージ情報
| CADモデル: | View CAD Model |
| Pkg. Type: | TSSOP |
| Pkg. Code: | PGG16 |
| Lead Count (#): | 16 |
| Pkg. Dimensions (mm): | 5.0 x 4.4 x 1.0 |
| Pitch (mm): | 0.65 |
環境及び輸出分類情報
| Moisture Sensitivity Level (MSL) | 1 |
| Pb (Lead) Free | Yes |
| ECCN (US) | EAR99 |
| HTS (US) | 8542.39.0090 |
製品スペック
| Lead Count (#) | 16 |
| Carrier Type | Tube |
| Moisture Sensitivity Level (MSL) | 1 |
| Qty. per Reel (#) | 0 |
| Qty. per Carrier (#) | 96 |
| Pb (Lead) Free | Yes |
| Pb Free Category | e3 Sn |
| Temp. Range (°C) | -40 to 85°C |
| Additive Phase Jitter Typ RMS (fs) | 40 |
| Additive Phase Jitter Typ RMS (ps) | 0.04 |
| Core Voltage (V) | 3.3 |
| Function | Buffer, Multiplexer |
| Input Freq (MHz) | 350 |
| Input Type | HCSL, HSTL, LVCMOS, LVDS, LVPECL, SSTL |
| Inputs (#) | 2 |
| Length (mm) | 5 |
| MOQ | 192 |
| Output Banks (#) | 1 |
| Output Freq Range (MHz) | 350 |
| Output Skew (ps) | 40 |
| Output Type | LVCMOS |
| Output Voltage (V) | 1.8V, 2.5V, 3.3V |
| Outputs (#) | 4 |
| Package Area (mm²) | 22 |
| Pitch (mm) | 0.65 |
| Pkg. Dimensions (mm) | 5.0 x 4.4 x 1.0 |
| Pkg. Type | TSSOP |
| Price (USD) | $5.292 |
| Product Category | Clock Buffers & Drivers, Clock Multiplexers |
| Requires Terms and Conditions | Does not require acceptance of Terms and Conditions |
| Tape & Reel | No |
| Thickness (mm) | 1 |
| Width (mm) | 4.4 |
| 掲載 | No |
8305I に関するリソース
説明
The 8305I is a low skew, 1-to-4, Differential/LVCMOS-to- LVCMOS/LVTTL Fanout Buffer. The 8305I has selectable clock inputs that accept either differential or single ended input levels. The clock enable is internally synchronized to eliminate runt pulses on the outputs during asynchronous assertion/deassertion of the clock enable pin. Outputs are forced LOW when the clock is disabled. A separate output enable pin controls whether the outputs are in the active or high impedance state. Guaranteed output and part-to-part skew characteristics make the 8305I ideal for those applications demanding well defined performance and repeatability.