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3.3V 512K x 18 ZBT Synchronous 3.3V I/O Pipelined SRAM

パッケージ情報

CADモデル:View CAD Model
Pkg. Type:TQFP
Pkg. Code:PKG100
Lead Count (#):100
Pkg. Dimensions (mm):20.0 x 14.0 x 1.4
Pitch (mm):0.65

環境及び輸出分類情報

Pb (Lead) FreeYes
Moisture Sensitivity Level (MSL)3
ECCN (US)3A991.b.2.a
HTS (US)8542.32.0041

製品スペック

Lead Count (#)100
Pb (Lead) FreeYes
Carrier TypeTray
Moisture Sensitivity Level (MSL)3
ArchitectureZBT
Bus Width (bits)18
Core Voltage (V)3.3
Density (Kb)9216
I/O Frequency (MHz)150 - 150
I/O Voltage (V)2.5 - 2.5
Length (mm)20
MOQ216
Organization512K x 18
Output TypePipelined
Package Area (mm²)280
Pb Free Categorye3 Sn
Pitch (mm)0.65
Pkg. Dimensions (mm)20.0 x 14.0 x 1.4
Pkg. TypeTQFP
Price (USD)$23.10116
Qty. per Carrier (#)72
Qty. per Reel (#)0
Requires Terms and ConditionsDoes not require acceptance of Terms and Conditions
Tape & ReelNo
Temp. Range (°C)-40 to 85°C
Thickness (mm)1.4
Width (mm)14
掲載No

説明

The 71V65803 3.3V CMOS SRAM, organized as 512K X 18, is designed to eliminate dead bus cycles when turning the bus around between reads and writes or writes and reads. Thus, it has been given the name ZBT™, or Zero Bus Turnaround. The 71V65803 contains data I/O, address, and control signal registers. In the burst mode, it can provide four cycles of data for a single address presented to the SRAM.