5T940

The 5T940 generates a high precision FEC (Forward Error Correction)or non-FEC source clock for SONET/SDH systems as well as a source clock for Gigabit Ethernet systems. This device also has clock regeneration capability: it creates a "clean" version of the clock input by using the internal oscillator to square the input clock's rising and falling edges and remove jitter. In the event that the main clock input fails, the device automatically locks to a backup reference clock using a hitless switchover mechanism. This device detects loss of valid CLKIN and leaves the VCO of the PLL at the last valid frequency while an alternate input REFIN is selected. If CLKIN and REFIN are different frequencies, the multiplication factor will be adjusted to retain the same output frequency. The 5T940 can act as a translator from a differential LVPECL, LVDS, or single-ended LVTTL input to LVPECL or LVDS outputs. The 5T940-10 has LVDS outputs and the 5T940-30 has LVPECL outputs. The three modes of output frequency range are controlled by the SELmode, which is a 3-level pin. When SELmode is high or low, the QOUT is a multiplied version of the input clock while QREG is a regenerated version of the input clock. When SELmode is mid, the QOUT is a multiplied version of the input clock while QREG is QOUT/4.The 5T940 features a selectable loop bandwidth. The 5T940 features a selectable loop bandwidth.