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Loco™ PLL Clock Multiplier

パッケージ情報

CADモデル: View CAD Model
Pkg. Type: TSSOP
Pkg. Code: DVG8
Lead Count (#): 8
Pkg. Dimensions (mm): 3.0 x 3.0 x 0.97
Pitch (mm): 0.65

環境及び輸出分類情報

Moisture Sensitivity Level (MSL) 3
Pb (Lead) Free Yes
ECCN (US) EAR99
HTS (US) 8542.39.0090

製品スペック

Lead Count (#) 8
Carrier Type Tube
Moisture Sensitivity Level (MSL) 3
Pitch (mm) 0.65
Pkg. Dimensions (mm) 3.0 x 3.0 x 0.97
Qty. per Reel (#) 0
Qty. per Carrier (#) 96
Output Freq Range (MHz) 13 - 140
Package Area (mm²) 9
Pb (Lead) Free Yes
Pb Free Category e3 Sn
Temp. Range (°C) -40 to 85°C
Core Voltage (V) 3.3V, 5V
Feedback Input No
Input Freq (MHz) 2 - 50
Input Type Crystal, LVCMOS
Inputs (#) 1
Length (mm) 3
MOQ 2592
Output Banks (#) 1
Output Type LVCMOS
Output Voltage (V) 3.3V, 5V
Outputs (#) 1
Period Jitter Typ P-P (ps) 70
Pkg. Type TSSOP
Prog. Clock No
Reference Output No
Requires Terms and Conditions Does not require acceptance of Terms and Conditions
Spread Spectrum No
Tape & Reel No
Thickness (mm) 0.97
Width (mm) 3
掲載 No

説明

The 501 Loco™ is the most cost effective way to generate a high-quality, high-frequency clock output from a lower frequency crystal or clock input. The name LOCO stands for Low Cost Oscillator, as it is designed to replace crystal oscillators in most electronic systems. Using Phase-Locked Loop (PLL) techniques, the device uses a standard fundamental mode, inexpensive crystal to produce output clocks up to 160 MHz. Stored in the chip's ROM is the ability to generate nine different multiplication factors, allowing one chip to output many common frequencies (see table on page 2). The device also has an output enable pin which tri-states the clock output when the OE pin is taken low. This product is intended for clock generation. It has low output jitter (variation in the output period), but input to output skew and jitter are not defined or guaranteed. For applications which require defined input to output skew, use the 570B.