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Renesas Electronics Corporation

Renesas’ Timing product portfolio has been acquired by SiTime.

Datasheets, documentation, and sample orders remain available on Renesas.com through late 2026. For new designs, purchasing, support, and product inquiries, visit SiTime.com or send an email to SalesClocks@sitime.com. Full transition to SiTime is expected by late 2026.

Features

  • 8-pin SOIC package, Pb free
  • Available in RoHS compliant package
  • IDT's lowest cost clock divider
  • Low skew (500 ps) outputs. One is /2 of the other
  • Easy to use with other generators and buffers
  • Input clock frequency up to 156 MHz
  • Output clock duty cycle of 45/55
  • Power-down turns off chip
  • Output Enable
  • Advanced, low-power CMOS process
  • Operating voltage of 3.3 V or 5 V
  • Does not degrade phase noise - no PLL
  • Available in industrial and commercial temperature ranges

Description

The 542 is cost effective way to produce a high-quality clock output divided from a clock input. The chip accepts a clock input up to 156 MHz at 3.3 V and produces a divide by 2, 4, 6, 8, 12, or 16 of the input clock. There are two outputs on the chip, one being a low-skew divide by two of the other. For instance, if an 100 MHz input clock is used, the 542 can produce low-skew 50 MHz and 25 MHz clocks, or low skew 25 MHz and 12.5 MHz clocks. The chip has an all-chip power-down mode that stops the outputs low, and an OE pin that tri-states the outputs. See the 501, 502, 511, 512, and 525 for clock multipliers.

Part NumberStatusSamplesStockPackageLead Count (#)Carrier TypeMoisture Sensitivity Level (MSL)Qty. per Reel (#)Qty. per Carrier (#)Pb (Lead) FreePb Free CategoryTemp. Range (°C)
542MILFObsoleteN/AIn StockSOIC8#Tube1097#Yese3 Sn-40 to 85°C
542MILFTObsoleteN/AOut of StockSOIC8#Reel13000#0Yese3 Sn-40 to 85°C
542MLFObsoleteN/AIn StockSOIC8#Tube1097#Yese3 Sn0 to 70°C
542MLFTObsoleteN/AIn StockSOIC8#Reel13000#0Yese3 Sn0 to 70°C

Support Communities

  1. Recommendation or direct replacement for the 542MLFT

    We have an old design that used the 542MLFT and I see that this device is obsolete.What do you recommend we use to replace this on new designs? [locked by: Sai (SWF) at 13:33 (GMT 0) on 16 Jun 2022]

    May 11, 2022
  2. DA16200 Iperf - Cannot exceed and average bandwidth of 27 Mbps over UDP

    Hello, I am currently working with DA16200 (SparkFun Qwiic WiFi Shield) and performing some "iperf" tests. I flashed the DA16200 FreeRTOS SDK example and configured it as an access point. I installed iperf v2.2.1 on my PC and connected to the access point. I configured the access point ...

    May 14, 2025
  3. DA14592 Proper TRNG and DRBG usage for single value.

    I have need to call rand() at startup of a firmware I'm creating.  First attempt it seems was generating the same value each boot. So..  I enabled: #define dg_configUSE_SYS_DRBG (1)#define dg_configUSE_SYS_TRNG (1) After this, I get a random value as ...

    May 16, 2025
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