Overview

Description

The 8A34002 System Synchronizer for IEEE 1588 generates ultra-low jitter; precision timing signals based on the IEEE 1588 Precision Time Protocol (PTP) and Synchronous Ethernet (SyncE). The device can be used as a single timing and synchronization source for a system or two of them can be used as a redundant pair for improved system reliability. Digitally Controlled Oscillators (DCOs) are available to be controlled by IEEE 1588 clock recovery servo software running on an external processor. The device supports physical layer timing with Digital PLLs (DPLLs) and other timing blocks necessary to implement a Synchronous Equipment Timing Source (SETS) for SyncE. The DCOs can be controlled using IEEE 1588 information alone, or they can combine IEEE 1588 time information with physical layer frequency information from SyncE in accordance with ITU-T G.8273.2. The device can be used to actively measure and compensate for clock propagation delays across backplanes and across circuit boards to ensure the distribution of accurate time and phase with minimal time error between IEEE 1588 Time Stamp Units (TSUs) in a system. The device supports multiple independent channels that control: IEEE 1588 clock synthesis; SyncE clock generation; jitter attenuation and universal frequency translation.  Input-to-input, input-to-output and output-to-output phase skew can all be precisely managed. The device outputs ultra-low-jitter clocks that can directly synchronize SERDES running at up to 28Gbps; as well as CPRI/OBSAI, SONET/SDH and PDH interfaces and IEEE 1588 TSUs.

To see other devices in this product family, visit the ClockMatrix Timing Solutions page.
To easily implement synchronization in IEEE 1588 systems, Renesas offers PTP Clock Manager Software for free under license.

Features

  • Four independent timing channels
  • Jitter output below 150fs RMS (typical)
  • Digital PLLs (DPLLs) lock to any frequency from 0.5Hz to 1GHz
  • DPLLs / Digitally Controlled Oscillators (DCOs) generate any frequency from 0.5Hz to 1GHz
  • DCO outputs can be aligned in phase and frequency with the outputs of any DPLL or DCO
  • DPLLs comply with ITU-T G.8262 for Synchronous Ethernet (SyncE)
  • IEEE 1588 Support:
    • DCOs can be controlled by external IEEE 1588 software to synthesize Precision Time Protocol (PTP) / IEEE 1588 clocks with frequency resolution less than 1.11x10-16
    • Combo Bus simplifies compliance with ITU-T G.8273.2
    • Precise (1ps) resolution for phase measurement and control
    • All outputs/inputs can be configured to decode/encode PWM clock signals
    • PWM can be used to transmit and receive embedded frame and sync pulses; as well as Time of Day (ToD) and other data
  • Device requires a crystal oscillator or fundamental-mode crystal: 25MHz to 54MHz
  • Optional XO_DPLL input allows a wider range for XO, TCXO or OCXO frequencies from 1MHz to 150MHz for applications that require a local oscillator with high stability
  • Serial processor ports support 1MHz I2C or 50MHz SPI

Applications

Documentation

Document title Document type
Type
Date Date
PDF 2.34 MB Datasheet
PDF 1.71 MB Application Note
PDF 465 KB Application Note
PDF 199 KB Application Note
PDF 164 KB Application Note
PDF 140 KB Application Note
PDF 96 KB Application Note
PDF 84 KB Application Note
PDF 57 KB Application Note
PDF 1.16 MB Application Note
PDF 70 KB Application Note
PDF 1.92 MB Application Note
PDF 2.13 MB Application Note
PDF 393 KB Application Note
PDF 231 KB Application Note
PDF 349 KB Application Note
PDF 1.62 MB Application Note
PDF 354 KB Application Note
PDF 563 KB Application Note
PDF 390 KB Application Note
PDF 880 KB Application Note
PDF 584 KB Application Note
PDF 162 KB Application Note
PDF 739 KB Application Note
PDF 633 KB Application Note
PDF 479 KB Application Note
PDF 442 KB Application Note
PDF 566 KB Application Note
PDF 659 KB Application Note
PDF 324 KB Application Note
PDF 38 KB Device Errata
PDF 10.53 MB Guide
PDF 2.35 MB Guide
PDF 213 KB Guide
PDF 143 KB Guide
PDF 2.35 MB Guide
PDF 215 KB Manual - Software
XLSX 321 KB Other
PDF 320 KB Overview
PDF 1.83 MB Overview
PDF 550 KB Product Change Notice
PDF 113 KB Product Change Notice
PDF 301 KB Product Change Notice
PDF 123 KB Product Change Notice
PDF 435 KB Product Change Notice
PDF 164 KB Release Note
PDF 103 KB Release Note
PDF 6.54 MB Report
PDF 206 KB Schematic
PDF 400 KB White Paper
50 items

Design & Development

Software & Tools

Software & Tools

Software title
Software type
Company
PTP Clock Manager for Linux
Supports IEEE 1588 and Synchronous Ethernet communication requirements. PTP Clock Manager features a clock servo and Packet Delay Variation (PDV) filter to meet the needs for G.8275.1 and G.8275.2 standards from the ITU-T.
Protocol Stack Renesas
1 item

Software Downloads

Software title Software type
Type
Date Date
ZIP 51.88 MB Software & Tools - Other
ZIP 18.02 MB Software & Tools - Other
ZIP 278 KB Software & Tools - Other
ZIP 73 KB Software & Tools - Other
ZIP 177 KB Software & Tools - Other
ZIP 177 KB Software & Tools - Other
6 items

Models

Models

Title Type Type Date Date
ZIP 2 KB Model - BSDL
ZIP 2 KB Model - BSDL
BSDL 12 KB Model - BSDL
ZIP 2.55 MB Model - IBIS
4 items

Support

IDT ClockMatrix™ Timing Solution for 100Gbps Interface Speeds (IEEE 1588, OTN, and SyncE)

Introducing the IDT ClockMatrix™ family of devices - high-performance, precision timing solutions designed to simplify clock designs for applications with up to 100 Gbps interface speeds. 

They can be used anywhere in a system to perform critical timing functions, such as clock generation, frequency translation, jitter attenuation and phase alignment. A range of devices in the family support BBU, OTN, SyncE, synthesizer and jitter attenuator applications with several density options for each.

For more information, visit www.idt.com/clockmatrix.