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X9258

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Low Noise, Low Power, 2-Wire Bus, 256 Taps Quad Digital Controlled Potentiometer (XDCP™)

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Overview

The X9258 integrates 4 digitally controlled potentiometers (XDCP™) on a monolithic CMOS integrated circuit. The digitally controlled potentiometer is implemented using 255 resistive elements in a series array. Between each element are tap points connected to the wiper terminal through switches. The position of the wiper on the array is controlled by the user through the 2-wire bus interface. Each potentiometer has associated with it a volatile Wiper Counter Register (WCR) and 4 non-volatile Data Registers (DR0:DR3) that can be directly written to and read by the user. The contents of the WCR controls the position of the wiper on the resistor array though the switches. Power-up recalls the contents of DR0 to the WCR. The XDCP™ can be used as a three-terminal potentiometer or as a two-terminal variable resistor in a wide variety of applications including control, parameter adjustments, and signal processing.

X9258 Functional Diagram
X9258 Functional Diagram
  • Four potentiometers in one package
  • 256 resistor taps/potentiometer: 0.4% resolution
  • 2-wire serial interface
  • Wiper resistance, 40Ω typical @ V+ = 5V, V- = -5V
  • Four nonvolatile data registers for each potentiometer
  • Nonvolatile storage of wiper position
  • Standby current <5µA max (total package)
  • Power supplies
  • VCC = 2.7V to 5.5V
  • V+ = 2.7V to 5.5V
  • V- = -2.7V to -5.5V
  • 100kΩ, 50kΩ total potentiometer resistance
  • High reliability
  • Endurance: 100,000 data changes per bit per register
  • Register data retention: 100 years
  • 24 Ld SOIC, 24 Ld TSSOP
  • Dual supply version of X9259
  • Pb-free (RoHS compliant)

Documentation

Design & Development

Software Downloads
Type Title Date
Library
DCP Evaluation Board Software v6.03
EXE 2.56 MB
1 item

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FAQs

  1. What is the default wiper tap position for X9271 and X925x series of DCPs?

    Question:What is the default wiper tap position for these parts? Answer: The default wiper tap position for these 256 tap DCPs (X9250, X9251, X9252, X9258, X9259, X9271) is 170.

    Jan 1, 1970
  2. Why won't my DCP retain its wiper position after a power off/on cycle?

    ... saved position.   Answer: Please review Application Note AN162.  This application note describes, in detail, the proper power up sequence for the DCP devices.  Please note that even though it is written in regards to the X9258 DCP, it is still valid for all Renesas DCPs starting with the "X" prefix.

    Jan 1, 1970
  3. What is the power up sequence for DCPs with multiple power connections?

    ... type of conditions do you set for the Vcc requirements?   Answer: Our application note AN162 discusses both the Vcc requirement and the power up sequence you should follow. Although this application note refers to the X9258, it is applicable to all DCPs with 2-wire and 3-wire serial interfaces.

    Jan 1, 1970