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Features

  • Dense array of configurable logic
    • 1120 6-input, 2-output LUTs
    • 1120 D-Flip Flops (DFFs)
    • 5kb distributed memory
    • 32kb Block Random Access Memory (BRAM)
    • Configurable through NVM and/or SPI interface
  • 50MHz on-chip oscillator
  • Phase-locked Loop (PLL)
    • Input from external source or internal 50MHz oscillator
  • Power supply
    • VDDIO: 1.71V to 3.465V
    • VDDC: 1.1V ± 5%
  • Power-on reset (POR)
  • GPIO count
    • 19 GPIOs in the QFN packaging
  • Bitstream security features
    • Cyclic Redundancy Check (CRC) - OTP configuration only
  • Operating temperature range: -40°C to +85°C
  • RoHS compliant/Halogen-free
  • Available package
    • 24-pin QFN: 3.0mm x 3.0mm, 0.4mm pitch

Description

The SLG47910V ForgeFPGA provides a small, low-power component for common FPGA applications. Using this device, a circuit design is created by programming the one-time programmable (OTP) non-volatile memory (NVM) to configure the interconnect logic, the IO pins, and the macrocells of the SLG47910V. This highly versatile device allows a wide variety of FPGA applications to be designed within a very small, low-power integrated circuit.

This device is revolutionizing the low-density FPGA space. By combining a robust and well-sorted feature set with low power consumption, low price, and free, easy-to-use development software, the SLG47910V ForgeFPGA opens the door to low-density FPGA development to anyone and everyone.

Benefits

  • Ultra-low power consumption for use in even the most demanding wearable and power-constrained applications
  • Small package size to allow for tremendous design flexibility
  • Advanced 6-input 2-output lookup table (LUT) structure for increased efficiency in high-usage designs
  • Low price that opens the low-density FPGA market to customers of all sizes 

Parameters

Attributes Value
GPIOs (#) 19
Look-up Table (LUTs) 1120
On-chip Oscillator Freq. 50MHz
PLLs 1
Temp. Range (°C) -40 to +85°C

Package Options

Pkg. Type Pkg. Dimensions (mm) Lead Count (#)
STQFN24 3.0 x 3.0 x 0.55 24

Application Block Diagrams

Smart Wireless Wall Clock Block Diagram
Smart Wireless Wall Clock
Compact, low-cost clock design with a smooth transition of digits and automatic brightness adjustment.

Additional Applications

  • Sensor data aggregation and pipelining
  • Protocol conversion
  • Glue logic and edge processing
  • Advanced power sequencing
  • Consumer electronics
  • Data communications equipment
  • Notebooks and tablet PCs

Applied Filters:

The SLG47910V ForgeFPGA offers industry-leading cost, size, and ultra-low power consumption, with free development software.