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Description

The SH7144 Series single-chip RISC (Reduced Instruction Set Computer) microcomputers integrate a Renesas-original RISC CPU core with peripheral functions required for system configuration. The SH7144 series CPU has a RISC-type instruction set. Most instructions can be executed in one state (one system clock cycle), which greatly improves instruction execution speed. With this CPU, it has become possible to assemble low cost, high performance/high-functioning systems, even for applications that were previously impossible with microcomputers, such as real-time control, which demands high speeds. & In addition, the SH7144 series includes on-chip peripheral functions necessary for system configuration, such as a direct memory access controller (DMAC), large-capacity ROM and RAM, timers, a serial communication interface (SCI), an A/D converter. ROM and SRAM can be directly connected to the SH7144 MCU by means of an external memory access support function. This greatly reduces system cost.

Applications

  • Home Appliance
Part NumberStatusSamplesStockRoHSPackagePLP terminatedCPUBit SizeProgram Memory (KB)Data Flash (KB)RAM (KB)Lead Count (#)Supply Voltage (V)Operating Freq (Max) (MHz)I/O PortsTimerADCDMAEthernetRTCLVD or PVDTemp. Range (°C)Moisture Sensitivity Level (MSL)
HD6417144F50VObsoleteN/AOut of StockRoHS:EN
RoHS:JA
QFPSH-232008KB112#3 - 3.650MHz8216-bit x 7-ch10-bit x 8-chYesNoNoNo-20 to +753
HD6417144FW50VObsoleteN/AOut of StockRoHS:EN
RoHS:JA
QFPSH-232008KB112#3 - 3.650MHz8216-bit x 7-ch10-bit x 8-chYesNoNoNo-40 to +85
HD64F7144F50VObsoleteN/AOut of StockRoHS:EN
RoHS:JA
QFP2024 Jan (terminated)SH-232256KB08KB112#3 - 3.650MHz8216-bit x 7-ch10-bit x 8-chYesNoNoNo-20 to +753
HD64F7144FW50VObsoleteN/AOut of StockRoHS:EN
RoHS:JA
QFP2024 Jan (terminated)SH-232256KB08KB112#3 - 3.650MHz8216-bit x 7-ch10-bit x 8-chYesNoNoNo-40 to +853

Support Communities

  1. Does anyone know of a command line flash utility for SH processors?

    Target processor is SH7144.Host machine is running windows.I am able to flash using FDT v4.03 with no problems.I am trying to come up with a method where I can just run something like a batch file to flash a board, without any user interaction other than ...

    Sep 30, 2009

Knowledge Base

  1. SH Family: What is the difference between the DTC and DMAC?

    The DMAC(Direct Memory Access Controller) has registers dedicated to each channel to designate a transfer address, mode and so on. Contrary to this, the DTC(Data Transfer Controller) stores data such as a transfer address, mode in the memory, and once transfer is requested, it reads these data and ...

    Mar 24, 2009
  2. Why there's error dialog when I download program to internal Flash ROM?

    This error occurs when a write (or erase) event to the internal Flash ROM fails. The cause of the error is most likely one of the following. The "system clock" or "clock" value input when the E10A-USB emulator was started was incorrect.SH7047F, SH7144F or SH7145F: input the "system ...

    Jul 17, 2008
  3. SH Family: Why is it an advantage to have individual vectors for each peripheral ?

    Speed of operation. The CPU does not have to consume time by interrogating a status register to determine which interrupt has been generated.

    Mar 18, 2009
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