Package Information
| Pkg. Type: | FBGA |
| Pkg. Code: | pkg_20136 |
| Lead Count (#): | 729 |
| Pkg. Dimensions (mm): | 23 x 23 x 2.40 |
| Pitch (mm): | 0.8 |
Environmental & Export Classifications
| Moisture Sensitivity Level (MSL) | 3 |
| RoHS (R9A09G077M04GBG#BC1) | EnglishJapanese |
| Pb (Lead) Free | Yes |
| ECCN (US) | |
| HTS (US) |
Product Attributes
| Carrier Type | Full Carton (Tray) |
| Family Name | RZ |
| Series Name | RZ/T |
| Group Name | T2H |
| CPU Architecture | Arm |
| Main CPU | Cortex-A55 |
| Sub CPU | Cortex-R52 x 2 |
| Floating Point Unit | Double/Single |
| Bit Length | 64 |
| Program Memory (KB) | 0 |
| Data Flash (KB) | 0 |
| RAM (KB) | 3200 |
| ECC SRAM | Yes |
| Lead Count (#) | 729 |
| Pkg. Type | FCBGA |
| Pitch (mm) | 0.8 |
| Pkg. Dimensions (mm) | 23 x 23 x 2.4 |
| Number of Supply Voltage(s) (#) | 4 |
| Supply Voltage (V) | - |
| I/O Ports | 287 |
| DMAC or DTC | DMAC |
| DMA (ch) | 32 |
| Temperature Sensor (ch) (#) | 1 |
| Power-On Reset | No |
| Watchdog Timer (ch) | 6 |
| External Memory Bus (bit) | 8,16,32 |
| DRAM I/F | LPDDR4-3200 |
| Accelerator | No |
| MOQ | 352 |
| Temp. Range (°C) | Tj = -40 to +125 |
| External Interrupt Pins (#) | 16 |
| LVD or PVD | No |
| Operating Freq (Max) (MHz) | 1200 |
| Operating Freq of Sub CPU (Max) | 1000 |
| Sub-clock (32.768 kHz) | Yes |
| On-chip Oscillator | Yes |
| Ethernet speed | 10M/100M/1G |
| Ethernet (ch) | 4 |
| EtherCat (ch) (#) | 1 |
| USB Ports (#) | 1 |
| USB FS (host ch/device ch) | ( 1 / 1 ) |
| USB HS (host ch/device ch) | ( 1 / 1 ) |
| USB SS (host ch/device ch) | ( 0 / 0 ) |
| PCI Express (generation and ch) | PCIe (Gen3.0 2Lane) x 1 ch |
| SCI or UART (ch) | 18 |
| SPI (ch) | 4 |
| QSPI (ch) | 2 |
| OSPI (ch) | 2 |
| I2C (#) | 3 |
| I3C (ch) | 0 |
| CAN (ch) | 0 |
| CAN-FD (ch) | 2 |
| Wireless | No |
| IrDA | No |
| LIN (#) | 0 |
| SDHI (ch) | 2 |
| High Resolution Output Timer | No |
| PWM Output (pin#) | 63 |
| 32-Bit Timer (ch) | 59 |
| 16-Bit Timer (ch) (#) | 14 |
| 8-Bit Timer (ch) | 0 |
| Standby operable timer | No |
| Asynchronous General Purpose Timer / Interval Timer (ch) | 0 |
| RTC | Yes |
| 16-Bit A/D Converter (ch) | 0 |
| 14-Bit A/D Converter (ch) | 0 |
| 12-Bit A/D Converter (ch) | 14 |
| 10-Bit A/D Converter (ch) | 0 |
| 24-Bit Sigma-Delta A/D Converter (ch) | 0 |
| 16-Bit D/A Converter (ch) | 0 |
| 12-Bit D/A Converter (ch) | 0 |
| 10-Bit D/A Converter (ch) (#) | 0 |
| 8-Bit D/A Converter (ch) | 0 |
| Analog Comparator (ch) | 0 |
| OPAMP (ch) (#) | 0 |
| PGA (ch) | 0 |
| Capacitive Touch Sensing Unit (ch) | 0 |
| Graphics LCD Controller | Yes |
| MIPI Interfaces (DSI) (ch) | 0 |
| MIPI Interfaces (CSI) (ch) | 0 |
| Camera I/F (Parallel) | No |
| Image Codec | No |
| 2D Drawing Engine | No |
| Segment LCD Controller | No |
| SSI (ch) | 0 |
| Security & Encryption | Arm TrustZone, Unique ID |
| Debug Interface | JTAG/SWD |
| Remarks | Industrial Ethernet, Absolute Encoder IF |
| Moisture Sensitivity Level (MSL) | 3 |
| Family Name | |
| Group Name | |
| Lead Compliant | Yes |
| Length (mm) | 23 |
| Pb (Lead) Free | Yes |
| Suggested Kits | |
| Tape & Reel | No |
| Thickness (mm) | 2.4 |
| Width (mm) | 23 |
Resources for RZ/T2H
Description
RZ/T2H is an advanced high-end microprocessor (MPU) providing high application processing performance, high-precision real-time control, and Linux operations on a single chip. It has the processing power and peripheral functions required for controllers such as industrial robots, motion controllers, and programmable logic controllers (PLCs). Quad Arm® Cortex®-A55 CPU cores (1200MHz) for application processing and two Arm Cortex-R52 CPU cores (1000MHz) for real-time control, as well as network functions compatible with Time-Sensitive Networking (TSN) and various industrial Ethernet protocols such as EtherCAT, EtherNet/IP, and PROFINET RT/IRT. The peripheral functions are capable of controlling motors of up to 9 axes with low latency access from a Cortex-R52 CPU. Equipped with a large-capacity memory interface of LPDDR4, and a large-capacity non-volatile memory interface of SD/eMMC, it supports application-rich operating systems such as Linux. Two lanes of PCIe Gen3, 2 channels of xSPI, and other high-speed interfaces are also available. Multi-axis motor control can be achieved with a single chip, reducing the number of BOM components, thus contributing to reduced power consumption and board size.