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Description

The R8C/2B Group is supported only for customers who have already adopted these products. The RL78/G14 Group is recommended for new designs.

The R8C/2A Group and R8C/2B Group of single-chip MCUs incorporates the R8C/Tiny Series CPU core, employing sophisticated instructions for a high level of efficiency. With 1Mb of address space, and it is capable of executing instructions at high speed. In addition, the CPU core boasts a multiplier for high-speed operation processing.

Power consumption is low, and the supported operating modes allow additional power control. These MCUs also use an anti-noise configuration to reduce emissions of electromagnetic noise and are designed to withstand EMI. Integration of many peripheral functions, including multifunction timer and serial interface, reduces the number of system components. Furthermore, the R8C/2B Group has on-chip data flash (1KB × 2 blocks). The difference between the R8C/2A Group and R8C/2B Group is only the presence or absence of data flash. Their peripheral functions are the same.

Applications

  • Electronic Household Appliances
  • Office Equipment
  • Audio Equipment
  • Consumer Equipment
Part NumberStatusSamplesStockRoHSPackageBudgetary Price (USD)RAM (KB)Lead Count (#)Temp. Range (°C)Country of AssemblyCountry of Wafer Fabrication
R5F212B7SDFA#V2ObsoleteN/AOut of StockRoHS:EN
RoHS:JA
LQFP2.5KB64#-40 to +85
R5F212B7SDFA#X6ObsoleteN/AOut of StockRoHS:EN
RoHS:JA
LQFP2.5KB64#-40 to +85
R5F212B7SDFP#V2NRNDN/AIn StockContactLFQFP1ku | $6.112.5KB64#-40 to +85CHINAJAPAN
R5F212B7SDFP#X6ObsoleteN/AOut of StockRoHS:EN
RoHS:JA
LFQFP2.5KB64#-40 to +85
R5F212B7SNFA#V2ObsoleteN/AIn StockRoHS:EN
RoHS:JA
LQFP2.5KB64#-20 to +85
R5F212B7SNFA#X6ObsoleteN/AOut of StockRoHS:EN
RoHS:JA
LQFP2.5KB64#-20 to +85
R5F212B7SNFP#V2NRNDN/AIn StockContactLFQFP1ku | $7.192.5KB64#-20 to +85CHINAJAPAN
R5F212B7SNFP#X6ObsoleteN/AOut of StockRoHS:EN
RoHS:JA
LFQFP2.5KB64#-20 to +85
R5F212B7SNLG#U0ObsoleteN/AOut of StockRoHS:EN
RoHS:JA
TFLGA2.5KB64#-20 to +85
R5F212B7SNLG#W4ObsoleteN/AOut of StockRoHS:EN
RoHS:JA
TFLGA2.5KB64#-20 to +85
R5F212B8SDFA#V2ObsoleteN/AIn StockRoHS:EN
RoHS:JA
LQFP3KB64#-40 to +85
R5F212B8SDFA#X6ObsoleteN/AOut of StockRoHS:EN
RoHS:JA
LQFP3KB64#-40 to +85
R5F212B8SDFP#V2ObsoleteN/AIn StockRoHS:EN
RoHS:JA
LFQFP3KB64#-40 to +85
R5F212B8SDFP#X6ObsoleteN/AOut of StockRoHS:EN
RoHS:JA
LFQFP3KB64#-40 to +85
R5F212B8SNFA#V2ObsoleteN/AIn StockRoHS:EN
RoHS:JA
LQFP3KB64#-20 to +85
R5F212B8SNFA#X6ObsoleteN/AOut of StockRoHS:EN
RoHS:JA
LQFP3KB64#-20 to +85
R5F212B8SNFP#V2NRNDN/AOut of StockContactLFQFP1ku | $6.23KB64#-20 to +85CHINAJAPAN
R5F212B8SNFP#X6ObsoleteN/AIn StockRoHS:EN
RoHS:JA
LFQFP3KB64#-20 to +85
R5F212B8SNLG#U0ObsoleteN/AOut of StockRoHS:EN
RoHS:JA
TFLGA3KB64#-20 to +85
R5F212B8SNLG#W4ObsoleteN/AOut of StockRoHS:EN
RoHS:JA
TFLGA3KB64#-20 to +85
R5F212BASDFA#V2ObsoleteN/AOut of StockRoHS:EN
RoHS:JA
LQFP7KB64#-40 to +85
R5F212BASDFA#X6ObsoleteN/AOut of StockRoHS:EN
RoHS:JA
LQFP7KB64#-40 to +85
R5F212BASDFP#V2NRNDN/AOut of StockContactLFQFP1ku | $8.387KB64#-40 to +85CHINAJAPAN
R5F212BASDFP#X6ObsoleteN/AOut of StockRoHS:EN
RoHS:JA
LFQFP7KB64#-40 to +85
R5F212BASNFA#V2ObsoleteN/AIn StockRoHS:EN
RoHS:JA
LQFP7KB64#-20 to +85
R5F212BASNFA#X6ObsoleteN/AOut of StockRoHS:EN
RoHS:JA
LQFP7KB64#-20 to +85
R5F212BASNFP#V2NRNDN/AOut of StockContactLFQFP1ku | $6.817KB64#-20 to +85CHINAJAPAN
R5F212BASNFP#X6ObsoleteN/AOut of StockRoHS:EN
RoHS:JA
LFQFP7KB64#-20 to +85
R5F212BASNLG#U0ObsoleteN/AOut of StockRoHS:EN
RoHS:JA
TFLGA7KB64#-20 to +85
R5F212BASNLG#W4ObsoleteN/AOut of StockRoHS:EN
RoHS:JA
TFLGA7KB64#-20 to +85
R5F212BCSDFA#V2ObsoleteN/AOut of StockRoHS:EN
RoHS:JA
LQFP7.5KB64#-40 to +85
R5F212BCSDFA#X6ObsoleteN/AOut of StockRoHS:EN
RoHS:JA
LQFP7.5KB64#-40 to +85
R5F212BCSDFP#V2NRNDN/AOut of StockContactLFQFP1ku | $97.5KB64#-40 to +85CHINAJAPAN
R5F212BCSDFP#X6ObsoleteN/AOut of StockRoHS:EN
RoHS:JA
LFQFP7.5KB64#-40 to +85
R5F212BCSNFA#V2ObsoleteN/AIn StockRoHS:EN
RoHS:JA
LQFP7.5KB64#-20 to +85
R5F212BCSNFA#X6ObsoleteN/AOut of StockRoHS:EN
RoHS:JA
LQFP7.5KB64#-20 to +85
R5F212BCSNFP#V2NRNDN/AOut of StockContactLFQFP1ku | $7.677.5KB64#-20 to +85CHINAJAPAN
R5F212BCSNFP#X6NRNDN/AOut of StockContactLFQFP1ku | $7.327.5KB64#-20 to +85CHINAJAPAN
R5F212BCSNLG#U0ObsoleteN/AOut of StockRoHS:EN
RoHS:JA
TFLGA7.5KB64#-20 to +85
R5F212BCSNLG#W4ObsoleteN/AOut of StockRoHS:EN
RoHS:JA
TFLGA7.5KB64#-20 to +85

Support Communities

  1. Data Flash of R8C/2B and R8C/36C

    Hi,We use R8C/2B as main MCU for display of treadmill. Previously, we set  WDT at 260ms as the erase time and write time were 130ms respectively.Recently, we found the controller is forecored to reset continuously and checked it's caused by the whole progress of erase ...

    Nov 23, 2009
  2. R8C/2B S-record file

    Hi, I am using a micro R5F212B8 (from R8C/2B group). When I compile the project successfully, I got a mot (S-Record) file which has the field length of 40 bytes like: S22400400000F008040404040404242424A4642424241800000007081010101010100D05030F But I have another mot file from the same platform (micro R5F212B8, from R8C/ ...

    Apr 2, 2013
  3. program R8C/2B

    Hi, this is my 1st project on renesasPlz, can anyone suggest circuit to program R8C/2B using E8. I need ckt. to implement in my application.

    May 14, 2010
View All Results from Support Communities (14)

Knowledge Base

  1. (R8C) Are there any hardware precautions for accurate A/D conversion?

    In order to perform A/D conversion, it is necessary to fully charge the internal capacitor, but if the impedance of the A/D conversion target is high, the discharge and charge will take time and the conversion value will not be accurate. For correct A/D ...

    Jun 19, 2006
  2. Can a parallel programmer verify the program in condition the ROM code protect is enabled?

    The ROM code protect is enabled at the first MCU reset after setting the ROM code protect function. If there is no reset after writing the program, the program can be verified. Contact the parallel programmer manufacturer for programmer specifications.

    Dec 26, 2017
  3. What is the reason of reset caused by the watchdog timer?

    The RAM is also initialized in the start-up file (ncrt0.a30). It might need several tens of milliseconds to initialize the RAM because of the low-speed on-chip oscillator clock divided by 8 is automatically selected as the CPU clock after reset. Therefore, please refresh the watchdog timer ...

    Dec 26, 2017
View All Results from Knowledge Base (11)
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