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    • 1 result found for "21340"
    1. Support Forums
      Generate 25MHz waveform with 50% duty cycle
      Jan 20, 2021
      Hi, I intend to use SLG46826V to design a CLK buffer to generate 25MHz waveform with 50% duty circle however, the output seems not what I' expecting. Attached is the design with waveforms. Could you please advise?

    Knowledge Base

    1. Can I use alternative side of standard frequency of H8S/2134 subclock?
      Using another frequency other than 32.768 kHz is not tested and the subclock operation is not guaranteed.
    2. HD-6409 Manchester Encoder-Decoder Design and Application Support
      The HD-6409 is an old Harris Semiconductor CMOS Peripheral that came out before 1981. Intersil acquired Harris Semiconductor in 1999. All of the designers and application engineers for this product had left prior to the Intersil acquisition. Anoth...
    3. How to use images bigger than 512
      Document explaining how to configure the SDK to run images larger than the default 512kBSupporting Images Bigger than 512 kB — getting_started (renesas.com)

    Support Communities

    1. Generate 25MHz waveform with 50% duty cycle
      Jan 20, 2021
      Hi, I intend to use SLG46826V to design a CLK buffer to generate 25MHz waveform with 50% duty circle however, the output seems not what I' expecting. Attached is the design with waveforms. Could you please advise?
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