Features
- 3 DC/DC buck converters with programmable output voltage
- 9.5A dual-phase Buck1 with Dynamic Voltage Control
- 2.0A single-phase Buck2
- 2.4A single-phase Buck3
- 2 Programmable LDO Regulators with High PSRR
- 400mA LDO1
- 250mA LDO2
- VIN 4.75V to 5.25V
- Power sequence setting by inter programmer
- Power manager with programmable sequencing and adjustable soft-start
- I2C compatible Interface
- -40 °C to +85 °C ambient temperature range
- Package: QFN30 (4.5mm x 7mm, 0.5mm pin pitch), package with the thermal pad
Description
The PV88090 features a dual-phases buck converter providing a total of 9.5A current supplies for the CPUs (1.0/1.2V). PV88090 contains 2x single-phase buck converters generating DDR memory (1.5V) and auxiliary supply. The 2x LDO regulators to generate the EMMC (1.8V) supply from an intermediate 3.6V supply and the analog core supply (1.05V/1.2V) from the 1.5V output of the memory buck during normal mode and from 3.6V during standby mode.
The passive devices of the buck converters are fully integrated. There are three buck converters generating the supplies for CPUs, DDR memory and auxiliary functions in typical applications. The pass devices of the buck converters are fully integrated, so no external FETs or Schottky diodes are needed. This results in optimized power efficiency and a reduced external component count.
PV88090 provides Dynamic Voltage Control (DVC) to support adaptive adjustment of the supply voltage dependent on the processor load via direct register write through the I2C communication. All power blocks have overcurrent circuit protection and the start-up timing can be controlled through the I2C interface. Soft start-up limits the inrush current from the input node and secures a slope-controlled activation of the rail. The PV88090 is available in a 30-pin QFN package and is specified from –40 °C to 85 °C ambient temperature.
Applications
- Supply for digital television processors
- Power supply for digital set-top boxes (STB)
- Home networking products
| Part Number | Status | Samples | Stock | Package | Lead Count (#) | Carrier Type | Moisture Sensitivity Level (MSL) | Input Voltage Range (V) | Output Current (Max) [Rail 1] (A) | Pb (Lead) Free |
|---|---|---|---|---|---|---|---|---|---|---|
| PV88090-05FQ2 | NRND | N/A | Out of Stock | FC-MCQFN | 30# | Tape & Reel | 1 | 7 - 26 | 5A | Yes |
| PV88090-06FQ2 | NRND | N/A | Out of Stock | FC-MCQFN | 30# | Tape & Reel | 1 | 4.75 - 5.25 | 9.5A | Yes |
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- Application NotePDF 267 KB Feb 12, 2021AI-generated Summary: IRQ line-sharing among multiple devices in Linux-based systems can cause unhandled interrupts, leading to kernel failures. When an IRQ remains unserviced, the Linux kernel disables the IRQ line, potentially affecting all devices sharing it. This behavior arises after a threshold of unhandled interrupts triggers a diagnostic message and disables the IRQ. Solutions include allocating dedicated IRQs, masking interrupts via OTP or bootloader, and managing driver installation order. Specific recommendations for PMIC devices like DA9210 and DA9063 address interrupt masks and fault log clearance to mitigate such issues.
- Application NotePDF 680 KB Jan 25, 2018AI-generated Summary: The PV88090 PMIC manages power rail sequencing through 15 programmable time slots that control the power-up and power-down order of buck converters and LDOs. Slots can be assigned to power rails, with dummy slots inserted to create precise delays. The SYSTEM_END parameter differentiates standby and active modes, controlled via the STBY pin. The WAIT_ID function allows insertion of extended delay times beyond standard slot timing, configurable for first power-up or every sequence cycle. Sequencing parameters are programmable via I2C or GUI, supporting cascaded devices through GPIO and STBY pins.
- Application NotePDF 339 KB Jan 25, 2018AI-generated Summary: The PV88090 power management unit integrates three adjustable synchronous buck regulators and two LDO regulators to supply CPUs, I/O, and DDR memory in devices such as TVs, set-top boxes, and network servers. It delivers up to 9.5 A with high efficiency through automatic pulse frequency modulation and eliminates external Schottky diodes. The device supports dynamic voltage control via I2C, includes over-current and over-temperature protection, and features a soft-start mechanism to limit inrush current. Design examples cover inductor and capacitor selection for various output voltages and load currents, emphasizing optimized power subsystem design for reliable and efficient operation.
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- Application NotePDF 267 KB Feb 12, 2021AI-generated Summary: IRQ line-sharing among multiple devices in Linux-based systems can cause unhandled interrupts, leading to kernel failures. When an IRQ remains unserviced, the Linux kernel disables the IRQ line, potentially affecting all devices sharing it. This behavior arises after a threshold of unhandled interrupts triggers a diagnostic message and disables the IRQ. Solutions include allocating dedicated IRQs, masking interrupts via OTP or bootloader, and managing driver installation order. Specific recommendations for PMIC devices like DA9210 and DA9063 address interrupt masks and fault log clearance to mitigate such issues.
- Application NotePDF 680 KB Jan 25, 2018AI-generated Summary: The PV88090 PMIC manages power rail sequencing through 15 programmable time slots that control the power-up and power-down order of buck converters and LDOs. Slots can be assigned to power rails, with dummy slots inserted to create precise delays. The SYSTEM_END parameter differentiates standby and active modes, controlled via the STBY pin. The WAIT_ID function allows insertion of extended delay times beyond standard slot timing, configurable for first power-up or every sequence cycle. Sequencing parameters are programmable via I2C or GUI, supporting cascaded devices through GPIO and STBY pins.
- Application NotePDF 339 KB Jan 25, 2018AI-generated Summary: The PV88090 power management unit integrates three adjustable synchronous buck regulators and two LDO regulators to supply CPUs, I/O, and DDR memory in devices such as TVs, set-top boxes, and network servers. It delivers up to 9.5 A with high efficiency through automatic pulse frequency modulation and eliminates external Schottky diodes. The device supports dynamic voltage control via I2C, includes over-current and over-temperature protection, and features a soft-start mechanism to limit inrush current. Design examples cover inductor and capacitor selection for various output voltages and load currents, emphasizing optimized power subsystem design for reliable and efficient operation.
Application Notes & White Papers (4)
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