Skip to main content
60V, 1A/2A Peak, Half-Bridge Driver with 4V UVLO

Package Information

CAD Model:View CAD Model
Pkg. Type:SOICN
Pkg. Code:MOU
Lead Count (#):8
Pkg. Dimensions (mm):4.9 x 3.9 x 0.00
Pitch (mm):1.3

Environmental & Export Classifications

Moisture Sensitivity Level (MSL)3
Pb (Lead) FreeYes
ECCN (US)EAR99
HTS (US)8542.39.0090
RoHS (HIP2103FBZ-T)Download

Product Attributes

Lead Count (#)8
Carrier TypeReel
Moisture Sensitivity Level (MSL)3
Pitch (mm)1.3
Pkg. Dimensions (mm)4.9 x 3.9 x 0.00
Pb (Lead) FreeYes
Pb Free CategoryPb-Free 100% Matte Tin Plate w/Anneal-e3
Temp. Range (°C)-40 to +125°C
Country of AssemblyMALAYSIA, TAIWAN
Country of Wafer FabricationTAIWAN
Bootstrap Supply Voltage (Max) (V)60
Charge PumpNo
Fall Time17
Input Logic Level3.3V/TTL
Length (mm)4.9
MOQ2500
Parametric CategoryHalf-Bridge FET Drivers
Peak Pull-down Current (A)2
Peak Pull-up Current (A)1
Pkg. TypeSOICN
Qualification LevelStandard
Rise Time (μs)0.021
Turn-Off Prop Delay (ns)30
Turn-On Prop Delay (ns)28
VBIAS (Max) (V)14
Width (mm)3.9

Description

The HIP2103 is a half-bridge driver designed for applications using DC motors, 3-phase brushless DC motors, or other similar loads. The two inputs (HI and LI) independently control the high-side driver (HO) and the low-side driver (LO). HI and LI can be configured to enable/disable the device, which lowers the number of connections to a microcontroller and the cost. The low IDD bias current in the Sleep mode prevents battery drain when the device is not in use, which eliminates the need for an external switch to disconnect the driver from the battery. Integrated pull-down resistors on all of the inputs (LI, HI, VDen, and VCen) reduce the need for external resistors. An active-low resistance pull-down on the LO output ensures that the low-side bridge FET remains off during the Sleep mode or when VDD is below the Undervoltage Lockout (UVLO) threshold.