Overview
Description
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The Intersil HCTS574MS is a Radiation Hardened non-inverting octal D-type, positive edge triggered flip-flop with three-stateable outputs. The HCTS574MS utilizes advanced CMOS/SOS technology. The eight flip-flops enter data into their registers on the LOW-to-HIGH transition of the clock (CP). Data is also transferred to the outputs during this transition. The output enable (OE) controls the three-state outputs and is independent of the register operation. When the output enable is high, the outputs are in the high impedance state. The HCTS574MS utilizes advanced CMOS/SOS technology to achieve high-speed operation. This device is a member of radiation hardened, high-speed, CMOS/SOS Logic Family. The HCTS574MS is supplied in a 20 lead Ceramic flatpack (K suffix) or a SBDIP Package (D suffix).
Features
- 3 Micron Radiation Hardened CMOS SOS
- Total Dose 200K RAD (Si)
- SEP Effective LET No Upsets: >100 MEV-cm2/mg
- Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/Bit- Day (Typ)
- Dose Rate Survivability: >1 x 1012 RAD (Si)/s
- Dose Rate Upset >1010 RAD (Si)/s 20ns Pulse
- Latch-Up Free Under Any Conditions
- Fanout (Over Temperature Range)
- Bus Driver O11utputs - 15 LSTTL Loads
- Military Temperature Range: -55°C to +125°C
- Significant Power Reduction Compared to LSTTL ICs
- DC Operating Voltage Range: 4.5V to 5.5V
- LSTTL Input Compatibility
- VIL = 0.8V Max
- VIH = VCC/2 Min
- Input Current Levels Ii ≤ 5µA at VOL, VOH
Comparison
Applications
Documentation
Featured Documentation
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| Type | Title | Date |
| Datasheet | PDF 421 KB | |
| Brochure | PDF 467 KB | |
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Design & Development
Models
ECAD Models
Schematic symbols, PCB footprints, and 3D CAD models from SamacSys can be found by clicking on the CAD Model links in the Product Options table. If a symbol or model isn't available, it can be requested directly from SamacSys.
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