Features
- 3 micron radiation hardened SOS CMOS
- Total dose 200K RAD (Si)
- SEP effective LET no upsets: >100 MEV-cm2/mg
- Single Event Upset (SEU) immunity < 2 x 10-9 errors/ bit-day (Typ)
- Dose rate survivability: >1 x 1012 RAD (Si)/s
- Dose rate upset >1010 RAD (Si)/s 20ns pulse
- Cosmic ray upset immunity < 2 x 10-9 errors/bit-day (Typ)
- Latch-up free under any conditions
- Military temperature range: -55 °C to +125 °C
- Significant power reduction compared to LSTTL ICs
- DC operating voltage range: 4.5V to 5.5V
- Input logic levels
- VIL = 30% of VCC Max
- VIH = 70% of VCC Min
- Input current levels Ii ≤ 5µA at VOL, VOH
HCS109MS Functional Diagram
Description
The Intersil HCS109MS is a radiation hardened dual J-K flip-flop with Set and Reset. The flip-flop changes state with the positive transition of the clock. The HCS109MS utilizes advanced CMOS/SOS technology to achieve high-speed operation. This device is a member of the radiation hardened, high-speed, CMOS/SOS logic family. The HCS109MS is supplied in a 16-lead Ceramic Flatpack (K suffix) or an SBDIP package (D suffix).
Support Communities
Get quick technical support online from Renesas Engineering Community technical staff.
Knowledge Base
Browse our knowledge base for helpful articles, FAQs, and other useful resources.
