Overview
Description
Dual Channel DDRII/III Zero Delay Buffer
Features
- High performance, low jitter zero delay buffer
- I2C for functional and output control
- Dual bank 1-6 differential clock distribution
- 2 separate feedback in & out for input to output
- synchronization for each bankSupports up to 4 DDR DIMMs
- Supports up to DDRII - 1066MHz
- Supports up to DDRIII (1.8V core) - 1333MHz
Comparison
Applications
Design & Development
Models
ECAD Models
Schematic symbols, PCB footprints, and 3D CAD models from SamacSys can be found by clicking on products in the Product Options table. If a symbol or model isn't available, it can be requested directly from the website.
Processing table
| SSOP | 48 | C | Yes | Tube | ||
| SSOP | 48 | C | Yes | Reel |
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