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Overview

Description

The 9FGL0641/51 devices are 6-output 3.3V PCIe Gen 1–6 clock generators. Each output has a dedicated OE# pin supporting PCIe CLKREQ# functionality. Two different spread spectrum levels, in addition to spread off, are supported. The 9FGL0641/51 supports PCIe Gen 1–6 Common Clocked architectures (CC), PCIe Separate Reference no Spread (SRNS), and Separate Reference Independent Spread (SRIS) clocking architectures.

For information regarding evaluation boards and material, please contact your local sales representative.

Features

  • PCIe Gen 1–6 CC-compliant
  • Supports PCIe SRIS and SRNS clocking
  • Integrated terminations for 100Ω and 85Ω systems save 4 resistors per output
  • Pin-selectable SRNS 0%, CC 0%, and CC/SRIS -0.5% spread
  • SMBus-selectable CC/SRIS -0.25% spread
  • One 3.3V LVCMOS REF output with Wake-On-LAN (WOL) support
  • Easy AC coupling to other logic families, see application note AN-891.
  • Space saving 5mm × 5mm 40-VFQFPN

Comparison

Applications

Documentation

Design & Development

Software & Tools

Software Downloads

Type Title Date
Software & Tools - Evaluation Software Log in to Download ZIP 440 KB
1 item

Models

ECAD Models

Schematic symbols, PCB footprints, and 3D CAD models from SamacSys can be found by clicking on the CAD Model links in the Product Options table. If a symbol or model isn't available, it can be requested directly from SamacSys.

Diagram of ECAD Models

Models

Type Title Date
Model - IBIS ZIP 89 KB
Model - IBIS ZIP 89 KB
Model - IBIS ZIP 203 KB
3 items

Product Options

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