Features
- Devices QML qualified in accordance with MIL-PRF-38535
- Detailed electrical and screening requirements are contained in SMD# 5962-96717 and Renesas' Intersil QM Plan
- 1.25 micron radiation hardened SOS CMOS
- Total dose >300K RAD (Si)
- Single Event Upset (SEU) immunity: <1 x 10-10 errors/bit/day (Typ)
- SEU LET threshold >100 MEV-cm2/mg
- Dose rate upset >1011 RAD (Si)/s, 20ns pulse
- Dose rate survivability >1012 RAD (Si)/s, 20ns pulse
- Latch-up free under any conditions
- Military temperature range -55 °C to +125 °C
- Significant power reduction compared to ALSTTL logic
- DC operating voltage range 4.5V to 5.5V
- Input logic levels
- VIL = 0.8V Max
- VIH = VCC/2 Min
- Input current ≤1µA at VOL, VOH
- Fast propagation delay 17.5ns (Max), 12ns (Typ)
Description
The Intersil ACTS240MS is a radiation hardened high reliability, high-speed CMOS/SOS that has two active low enable inputs. The ACTS240MS utilizes advanced CMOS/SOS technology to achieve high-speed operation. This device is a member of the radiation hardened, high-speed, CMOS/SOS logic family. The ACTS240MS is supplied in a 20-lead ceramic flatpack (K suffix) or a dual in-line ceramic package (D suffix).
| Part Number | Status | Samples | Stock | Package | Lead Count (#) | Carrier Type | Moisture Sensitivity Level (MSL) | Pitch (mm) | Pkg. Dimensions (mm) | DLA SMD | Pb (Lead) Free | Pb Free Category | MOQ | Temp. Range (°C) | CAGE code |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| ACTS240DMSR | Obsolete | N/A | Out of Stock | SBDIP | 20# | Tube | Not Applicable | 2.5mm | 25.4 x 7.5 x 2.41 | 5962F9671701VRC | Exempt | Gold Plate over compliant Undercoat-e4 | 25 | -55 to +125°C | 34371 |
| ACTS240KMSR | Obsolete | N/A | Out of Stock | CFP | 20# | Tray | Not Applicable | 1.3mm | 12.7 x 7.5 x 0.00 | 5962F9671701VXC | Exempt | Gold Plate over compliant Undercoat-e4 | 25 | -55 to +125°C | 34371 |
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- Price Increase NoticePDF 360 KB PIN19011 Apr 10, 2019
- Product AdvisoryPDF 499 KB PA11003 Jan 05, 2011
- Product Change NoticePDF 230 KB PCN10123 Dec 06, 2010
- Application NotePDF 224 KB an9654 May 05, 1999AI-generated Summary: The document explains the reliability and failure mechanisms of semiconductor parts, focusing on life testing and wearout. It discusses how switching states cause transient current pulses and hot carrier injection, which only occur briefly during switching. Life testing at elevated temperatures accelerates aging to remove infant mortality failures, improving reliability. The failure rate follows a bathtub curve with infant mortality, useful life, and wearout phases, modeled by lognormal and exponential distributions. The Arrhenius equation relates failure rates at different temperatures. Burn-in and life tests reduce early failures without harming intrinsic reliability.
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- Application NotePDF 224 KB an9654 May 05, 1999AI-generated Summary: The document explains the reliability and failure mechanisms of semiconductor parts, focusing on life testing and wearout. It discusses how switching states cause transient current pulses and hot carrier injection, which only occur briefly during switching. Life testing at elevated temperatures accelerates aging to remove infant mortality failures, improving reliability. The failure rate follows a bathtub curve with infant mortality, useful life, and wearout phases, modeled by lognormal and exponential distributions. The Arrhenius equation relates failure rates at different temperatures. Burn-in and life tests reduce early failures without harming intrinsic reliability.
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- Price Increase NoticePDF 360 KB PIN19011 Apr 10, 2019
- Product AdvisoryPDF 499 KB PA11003 Jan 05, 2011
- Product Change NoticePDF 230 KB PCN10123 Dec 06, 2010
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