Renesas’ Timing product portfolio has been acquired by SiTime.
Datasheets, documentation, and sample orders remain available on Renesas.com through late 2026. For new designs, purchasing, support, and product inquiries, visit SiTime.com or send an email to [email protected]. Full transition to SiTime is expected by late 2026.
| CAD Model: | View CAD Model |
| Pkg. Type: | VFQFPN |
| Pkg. Code: | NLG32 |
| Lead Count (#): | 32 |
| Pkg. Dimensions (mm): | 5.0 x 5.0 x 0.9 |
| Pitch (mm): | 0.5 |
| Moisture Sensitivity Level (MSL) | 3 |
| Pb (Lead) Free | Yes |
| ECCN (US) | EAR99 |
| HTS (US) | 8542.39.0090 |
| Lead Count (#) | 32 |
| Carrier Type | Reel |
| Moisture Sensitivity Level (MSL) | 3 |
| Qty. per Reel (#) | 2500 |
| Qty. per Carrier (#) | 0 |
| Pb (Lead) Free | Yes |
| Pb Free Category | e3 Sn |
| Temp. Range (°C) | -40 to 85°C |
| Country of Assembly | MALAYSIA |
| Country of Wafer Fabrication | TAIWAN |
| Accepts Spread Spec Input | Yes |
| Additive Jitter | - |
| Advanced Features | Multiple SMBus addresses, SW PLL mode control |
| App Jitter Compliance | 25G EDR, IF-UPI, PCIe Gen1, PCIe Gen2, PCIe Gen3, PCIe Gen4, PCIe Gen5, DB2000Q, QPI, UPI |
| Architecture | Common, SRIS, SRNS |
| C-C Jitter Max P-P (ps) | 50 |
| Chipset Manufacturer | Intel |
| Clock Spec. | DB800ZL v1.2 Derivative |
| Core Voltage (V) | 3.3V |
| Diff. Input Signaling | HCSL |
| Diff. Inputs | 1 |
| Diff. Output Signaling | LP-HCSL |
| Diff. Outputs | 4 |
| Diff. Termination Resistors | 24 |
| Feedback Input | No |
| Function | Zero Delay Buffer |
| Input Freq (MHz) | 33 - 150 |
| Input Type | HCSL |
| Inputs (#) | 1 |
| Length (mm) | 5 |
| MOQ | 2500 |
| Output Banks (#) | 1 |
| Output Enable (OE) Pins | 4 |
| Output Freq Range (MHz) | 1 - 400 |
| Output Impedance | 85 |
| Output Skew (ps) | 50 |
| Output Type | LP-HCSL |
| Output Voltage (V) | 0.7V |
| Outputs (#) | 4 |
| PLL | Yes |
| Package Area (mm²) | 81 |
| Pitch (mm) | 0.5 |
| Pkg. Dimensions (mm) | 5.0 x 5.0 x 0.9 |
| Pkg. Type | VFQFPN |
| Power Consumption Typ (mW) | 158 |
| Product Category | PCI Express Clocks, Processor Clock Buffers, Zero Delay Buffers |
| Reel Size (in) | 13 |
| Reference Output | No |
| Spread Spectrum | Yes |
| Supply Voltage (V) | 3.3 - 3.3 |
| Tape & Reel | Yes |
| Thickness (mm) | 0.9 |
| VOUT Amplitude Control | No |
| VOUT Slew-rate Control | No |
| Width (mm) | 5 |
The 9ZXL0451E is a second-generation enhanced performance DB800ZL derivative for PCIe Gen 4 and 5 applications. In fanout (bypass) mode, it is DB2000Q compatible. A fixed external feedback in zero-delay buffers (ZDB) mode maintains low drift for critical QPI/UPI.