Features
- 19 - 0.7V HCSL differential HCSL output pairs
- Adjustable external feedback path
- Phase jitter: PCIe Gen3 < 1ps rms
- Phase jitter: QPI 9.6GT/s < 0.2ps rms
- PLL or bypass mode
- PLL can de-jitter incoming clock
- 9 selectable SMBus Addresses
- 8 OE# pins
- 100MHz or 133MHz PLL mode operation for PCIe and QPI applications
- Selectable PLL bandwidth minimizes jitter peaking in downstream PLLs
- Spread spectrum compatible
9ZX21901B - Block Diagram
Description
The 9ZX21901B is a version of the Intel DB1900Z differential buffer with an adjustable external feedback path allowing the user to eliminate trace delays from their design. It is suitable for PCIe Gen 3 or QPI applications. The part is backward compatible with PCIe Gen 1 and Gen 2. And, the device maintains low drift for critical QPI applications. In bypass mode, the 9ZX21901 can provide outputs up to 400MHz. See the 9ZX21901C for a fixed external feedback path.
Parameters
| Attributes | Value |
|---|---|
| Diff. Outputs | 19 |
| Diff. Output Signaling | HCSL |
| Output Freq Range (MHz) | 33 - 150 |
| Diff. Inputs | 1 |
| Diff. Input Signaling | HCSL |
| Accepts Spread Spec Input | Yes |
| Power Consumption Typ (mW) | 1350 |
| Supply Voltage (V) | 3.3 - 3.3 |
| Output Type | HCSL |
| Diff. Termination Resistors | 80 |
| Package Area (mm²) | 100 |
| Battery Backup | No |
| Battery Seal | No |
| CPU Supervisory Function POR | No |
| Crystal Frequency Trimming | No |
| Frequency Out Pin | No |
| Inputs (#) | 1 |
| Input Freq (MHz) | 33 - 150 |
| Function | Buffer |
| Input Type | HCSL |
| Output Banks (#) | 1 |
| Core Voltage (V) | 3.3 |
| Output Voltage (V) | 0.7 |
| Product Category | Processor Clock Buffers, Zero Delay Buffers |
Package Options
| Pkg. Type | Pkg. Dimensions (mm) | Lead Count (#) | Pitch (mm) |
|---|---|---|---|
| VFQFPN | 10.0 x 10.0 x 1.0 | 72 | 0.5 |
Applications
- Buffer for Romley servers
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