Features
- 12 - 0.7V HCSL differential output pairs
- Phase jitter: PCIe Gen3 < 1ps rms
- Phase jitter: PCIe Gen2 < 3.1ps rms
- Phase jitter: PCIe Gen1 < 86ps peak to peak
- Phase jitter: QPI 9.6GT/s < 0.2ps rmsSupports zero delay buffer mode and fanout mode
- Bandwidth programming available
- 9 selectable SMBus Addresses
- 4 OE# pins90-147 MHz operation in PLL mode
- 33-150 MHz operation in Bypass mode
Description
The 9ZX21200 is a small-footprint 12-output differential buffer that meets all the performance requirements of the Intel DB1200Z specification. The 9ZX21200 is backwards compatible to PCIe Gen1 and Gen2 applications. A fixed, internal feedback path maintains low drift for critical QPI applications. In bypass mode, the 9ZX21200 can provide outputs up to 150MHz.
Parameters
| Attributes | Value |
|---|---|
| Chipset Manufacturer | Intel |
| Clock Spec. | DB1200Z v0.7 Derivative |
| Diff. Outputs | 12 |
| Diff. Output Signaling | HCSL |
| Output Enable (OE) Pins | 4 |
| Output Freq Range (MHz) | - |
| Diff. Inputs | 1 |
| Diff. Input Signaling | HCSL |
| Accepts Spread Spec Input | Yes |
| Power Consumption Typ (mW) | 858 |
| Advanced Features | Multiple SMBus addresses, HW PLL mode control |
| App Jitter Compliance | PCIe Gen1, PCIe Gen2, PCIe Gen3, QPI |
| Package Area (mm²) | 64 |
Package Options
| Pkg. Type | Pkg. Dimensions (mm) | Lead Count (#) | Pitch (mm) |
|---|---|---|---|
| VFQFPN | 8.0 x 8.0 x 0.85 | 56 | 0.5 |