Features
- PCIe Gen 1–5 compliant
- PCIe Gen 5 Common Clock jitter < 80fs RMS
- 261fs RMS typical phase jitter at 156.25MHz (12kHz to 20MHz)
- 4 programmable output pairs plus 2 LVCMOS REF outputs
- 1 integer output frequency per configuration
- 1MHz to 325MHz output frequency (LVDS or LP-HCSL)
- 1MHz to 200MHz output frequency (LVCMOS)
- 1.8V to 3.3V core VDD
- Individual 1.8V to 3.3V VDDO for each programmable output pair
- Supports HCSL, LVDS, and LVCMOS I/O standards
- Supports AC-coupled LVPECL and CML logic – See AN-891
- 4mm × 4mm 24-VFQFPN and 24-LGA packages with 50MHz integrated crystal option
- Supported by Timing Commander™ software
9FGV1001 - Block Diagram
Description
The 9FGV1001 is a member of Renesas' PhiClock™ programmable clock generator family. The 9FGV1001 provides four non-spread-spectrum copies of a single output frequency and two copies of the crystal reference input. Two select pins allow for hardware selection of the desired configuration, or two I²C bits allow easy software selection of the desired configuration. The user may configure any one of the four OTP configurations as the default when operating in I²C mode. Four unique I²C addresses are available, allowing easy I²C access to multiple components.
This device is factory-configurable.
Try the Custom Part Configuration Utility.
Try the Custom Part Configuration Utility.
Parameters
| Attributes | Value |
|---|---|
| Diff. Outputs | 4 |
| Diff. Output Signaling | LP-HCSL |
| Output Freq Range (MHz) | 50 - 50, 100 - 100, 125 - 125, 156.25 - 156.25, 161.1328125 - 161.1328125, 312.5 - 312.5, 322.265625 - 322.265625, 156.25 - 156.25 |
| Accepts Spread Spec Input | No |
| Power Consumption Typ (mW) | 200 |
| Supply Voltage (V) | 1.8 - 1.8, 3.3 - 3.3 |
| Output Type | LP-HCSL |
| Xtal Freq (MHz) | 25 - 25, 39.0625 - 39.0625, 50 - 50 |
| Package Area (mm²) | 25 |
| Battery Backup | No |
| Battery Seal | No |
| CPU Supervisory Function POR | No |
| Crystal Frequency Trimming | No |
| Frequency Out Pin | No |
| Inputs (#) | 1 |
| Input Freq (MHz) | 25 - 25, 39.0625 - 39.0625, 50 - 50 |
| Function | Generator |
| Input Type | Crystal, LVCMOS |
| Output Banks (#) | 1 |
| Core Voltage (V) | 1.8, 3.3 |
| Output Voltage (V) | 1.8, 3.3 |
| Product Category | PhiClock, PCI Express Clocks, Programmable Clocks |
This device is factory-configurable.
Try the Custom Part Configuration Utility.
Try the Custom Part Configuration Utility.
| Part Number | Status | Samples | Longevity | Stock | Package | Budgetary Price (USD) | Lead Count (#) | Carrier Type | Moisture Sensitivity Level (MSL) | Phase Jitter Typ RMS (ps) | Input Freq (MHz) | Supply Voltage (V) | Xtal Freq (MHz) | App Jitter Compliance | Core Voltage (V) | Diff. Output Signaling | Output Freq Range (MHz) | Output Type | Output Voltage (V) | Pkg. Dimensions (mm) | Power Consumption Typ (mW) | Prog. Clock | Qty. per Reel (#) | Qty. per Carrier (#) | Pb (Lead) Free | Pb Free Category | Temp. Range (°C) | Country of Assembly | Country of Wafer Fabrication |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 9FGV1001C001NBGI | Active | Available | 2040 Apr | In Stock | VFQFPN | 1ku | $2.59 | 24# | Tray | 1 | 0.267ps | 25 - 25 | 3.3 - 3.3 | 25 - 25 | PCIe Gen1, PCIe Gen2, PCIe Gen3, PCIe Gen4, PCIe Gen5 | 3.3V | LP-HCSL | 50 - 50, 100 - 100, 125 - 125, 156.25 - 156.25 | LP-HCSL | 3.3V | 4.0 x 4.0 x 0.8 | 200mW | Yes | 0 | 490# | Yes | e3 Sn | -40 to 85°C | MALAYSIA, TAIWAN | SINGAPORE |
| 9FGV1001C001NBGI8 | Active | N/A | 2040 Apr | Out of Stock | VFQFPN | 1ku | $2.59 | 24# | Reel | 1 | 0.267ps | 25 - 25 | 3.3 - 3.3 | 25 - 25 | PCIe Gen1, PCIe Gen2, PCIe Gen3, PCIe Gen4, PCIe Gen5 | 3.3V | LP-HCSL | 50 - 50, 100 - 100, 125 - 125, 156.25 - 156.25 | LP-HCSL | 3.3V | 4.0 x 4.0 x 0.8 | 200mW | Yes | 2500# | 0 | Yes | e3 Sn | -40 to 85°C | MALAYSIA, TAIWAN | SINGAPORE |
| 9FGV1001C002NBGI | Active | Available | 2040 Apr | Out of Stock | VFQFPN | 24# | Tray | 1 | 0.299ps | 25 - 25 | 1.8 - 1.8 | 25 - 25 | PCIe Gen1, PCIe Gen2, PCIe Gen3, PCIe Gen4, PCIe Gen5 | 1.8V | LP-HCSL | 50 - 50, 100 - 100, 125 - 125, 156.25 - 156.25 | LP-HCSL | 1.8V | 4.0 x 4.0 x 0.8 | 200mW | Yes | 0 | 490# | Yes | e3 Sn | -40 to 85°C | |||
| 9FGV1001C002NBGI8 | Active | N/A | 2040 Apr | Out of Stock | VFQFPN | 24# | Reel | 1 | 0.299ps | 25 - 25 | 1.8 - 1.8 | 25 - 25 | PCIe Gen1, PCIe Gen2, PCIe Gen3, PCIe Gen4, PCIe Gen5 | 1.8V | LP-HCSL | 50 - 50, 100 - 100, 125 - 125, 156.25 - 156.25 | LP-HCSL | 1.8V | 4.0 x 4.0 x 0.8 | 200mW | Yes | 2500# | 0 | Yes | e3 Sn | -40 to 85°C | |||
| 9FGV1001C011NBGI | Active | Available | 2040 Apr | Out of Stock | VFQFPN | 24# | Tray | 1 | 0.233ps | 39.0625 - 39.0625 | 3.3 - 3.3 | 39.0625 - 39.0625 | PCIe Gen1, PCIe Gen2, PCIe Gen3, PCIe Gen4, PCIe Gen5 | 3.3V | LP-HCSL | 161.1328125 - 161.1328125, 312.5 - 312.5, 322.265625 - 322.265625, 156.25 - 156.25 | LP-HCSL | 3.3V | 4.0 x 4.0 x 0.8 | 200mW | Yes | 0 | 490# | Yes | e3 Sn | -40 to 85°C | |||
| 9FGV1001C011NBGI8 | Active | N/A | 2040 Apr | Out of Stock | VFQFPN | 24# | Reel | 1 | 0.233ps | 39.0625 - 39.0625 | 3.3 - 3.3 | 39.0625 - 39.0625 | PCIe Gen1, PCIe Gen2, PCIe Gen3, PCIe Gen4, PCIe Gen5 | 3.3V | LP-HCSL | 161.1328125 - 161.1328125, 312.5 - 312.5, 322.265625 - 322.265625, 156.25 - 156.25 | LP-HCSL | 3.3V | 4.0 x 4.0 x 0.8 | 200mW | Yes | 2500# | 0 | Yes | e3 Sn | -40 to 85°C | |||
| 9FGV1001C012NBGI | Active | Available | 2040 Apr | Out of Stock | VFQFPN | 24# | Tray | 1 | 0.261ps | 39.0625 - 39.0625 | 1.8 - 1.8 | 39.0625 - 39.0625 | PCIe Gen1, PCIe Gen2, PCIe Gen3, PCIe Gen4, PCIe Gen5 | 1.8V | LP-HCSL | 161.1328125 - 161.1328125, 312.5 - 312.5, 322.265625 - 322.265625, 156.25 - 156.25 | LP-HCSL | 1.8V | 4.0 x 4.0 x 0.8 | 200mW | Yes | 0 | 490# | Yes | e3 Sn | -40 to 85°C | |||
| 9FGV1001C012NBGI8 | Active | N/A | 2040 Apr | Out of Stock | VFQFPN | 24# | Reel | 1 | 0.261ps | 39.0625 - 39.0625 | 1.8 - 1.8 | 39.0625 - 39.0625 | PCIe Gen1, PCIe Gen2, PCIe Gen3, PCIe Gen4, PCIe Gen5 | 1.8V | LP-HCSL | 161.1328125 - 161.1328125, 312.5 - 312.5, 322.265625 - 322.265625, 156.25 - 156.25 | LP-HCSL | 1.8V | 4.0 x 4.0 x 0.8 | 200mW | Yes | 2500# | 0 | Yes | e3 Sn | -40 to 85°C | |||
| 9FGV1001CQ505LTGI | Active | Available | 2040 Apr | In Stock | LGA | 1ku | $3.08 | 24# | Tray | 3 | 0.223ps | 50 - 50 | 3.3 - 3.3 | 50 - 50 | PCIe Gen1, PCIe Gen2, PCIe Gen3, PCIe Gen4, PCIe Gen5 | 3.3V | LP-HCSL | 50 - 50, 100 - 100, 125 - 125, 156.25 - 156.25 | LP-HCSL | 3.3V | 4.0 x 4.0 x 1.4 | 200mW | Yes | 0 | 490# | Yes | e4 Au | -40 to 85°C | TAIWAN | SINGAPORE |
| 9FGV1001CQ506LTGI | Active | Available | 2040 Apr | In Stock | LGA | 1ku | $3.08 | 24# | Tray | 3 | 0.264ps | 50 - 50 | 1.8 - 1.8 | 50 - 50 | PCIe Gen1, PCIe Gen2, PCIe Gen3, PCIe Gen4, PCIe Gen5 | 1.8V | LP-HCSL | 50 - 50, 100 - 100, 125 - 125, 156.25 - 156.25 | LP-HCSL | 1.8V | 4.0 x 4.0 x 1.4 | 200mW | Yes | 0 | 490# | Yes | e4 Au | -40 to 85°C | TAIWAN | SINGAPORE |
| 9FGV1001CQ505LTGI8 | Preview | N/A | 2040 Apr | Out of Stock | LGA | 24# | Reel | 3 | 0.223ps | 50 - 50 | 3.3 - 3.3 | 50 - 50 | PCIe Gen1, PCIe Gen2, PCIe Gen3, PCIe Gen4, PCIe Gen5 | 3.3V | LP-HCSL | 50 - 50, 100 - 100, 125 - 125, 156.25 - 156.25 | LP-HCSL | 3.3V | 4.0 x 4.0 x 1.4 | 200mW | Yes | 2500# | 0 | Yes | e4 Au | -40 to 85°C | |||
| 9FGV1001CQ506LTGI8 | Preview | N/A | 2040 Apr | Out of Stock | LGA | 24# | Reel | 3 | 0.264ps | 50 - 50 | 1.8 - 1.8 | 50 - 50 | PCIe Gen1, PCIe Gen2, PCIe Gen3, PCIe Gen4, PCIe Gen5 | 1.8V | LP-HCSL | 50 - 50, 100 - 100, 125 - 125, 156.25 - 156.25 | LP-HCSL | 1.8V | 4.0 x 4.0 x 1.4 | 200mW | Yes | 2500# | 0 | Yes | e4 Au | -40 to 85°C | |||
| 9FGV1001B001NBGI | Obsolete | N/A | In Stock | VFQFPN | 24# | Tray | 1 | 0.261ps | 25 - 25 | 1.8 - 1.8, 2.5 - 2.5, 3.3 - 3.3 | 25 - 25 | PCIe Gen1, PCIe Gen2, PCIe Gen3, PCIe Gen4 | 3.3V | LP-HCSL | 50 - 50, 100 - 100, 125 - 125, 156.25 - 156.25 | LP-HCSL | 3.3V | 4.0 x 4.0 x 0.8 | 200mW | No | 0 | 490# | Yes | e3 Sn | -40 to 85°C | ||||
| 9FGV1001B001NBGI8 | Obsolete | N/A | Out of Stock | VFQFPN | 24# | Reel | 1 | 0.261ps | 25 - 25 | 1.8 - 1.8, 2.5 - 2.5, 3.3 - 3.3 | 25 - 25 | PCIe Gen1, PCIe Gen2, PCIe Gen3, PCIe Gen4 | 3.3V | LP-HCSL | 50 - 50, 100 - 100, 125 - 125, 156.25 - 156.25 | LP-HCSL | 3.3V | 4.0 x 4.0 x 0.8 | 200mW | No | 2500# | 0 | Yes | e3 Sn | -40 to 85°C | ||||
| 9FGV1001B002NBGI | NRND | Available | Out of Stock | VFQFPN | 24# | Tray | 1 | 0.261ps | 25 - 25 | 1.8 - 1.8, 2.5 - 2.5, 3.3 - 3.3 | 25 - 25 | PCIe Gen1, PCIe Gen2, PCIe Gen3, PCIe Gen4 | 1.8V | LP-HCSL | 50 - 50, 100 - 100, 125 - 125, 156.25 - 156.25 | LP-HCSL | 1.8V | 4.0 x 4.0 x 0.8 | 125mW | No | 0 | 490# | Yes | e3 Sn | -40 to 85°C | ||||
| 9FGV1001B002NBGI8 | Obsolete | N/A | Out of Stock | VFQFPN | 24# | Reel | 1 | 0.261ps | 25 - 25 | 1.8 - 1.8, 2.5 - 2.5, 3.3 - 3.3 | 25 - 25 | PCIe Gen1, PCIe Gen2, PCIe Gen3, PCIe Gen4 | 1.8V | LP-HCSL | 50 - 50, 100 - 100, 125 - 125, 156.25 - 156.25 | LP-HCSL | 1.8V | 4.0 x 4.0 x 0.8 | 125mW | No | 2500# | 0 | Yes | e3 Sn | -40 to 85°C | ||||
| 9FGV1001B003NBGI | Obsolete | N/A | Out of Stock | VFQFPN | 24# | Tray | 1 | 0.261ps | 25 - 25 | 1.8 - 1.8, 2.5 - 2.5, 3.3 - 3.3 | 25 - 25 | PCIe Gen1, PCIe Gen2, PCIe Gen3, PCIe Gen4 | 3.3V | LVDS | 50 - 50, 100 - 100, 125 - 125, 156.25 - 156.25 | LVDS | 3.3V | 4.0 x 4.0 x 0.8 | 200mW | No | 0 | 490# | Yes | e3 Sn | -40 to 85°C | ||||
| 9FGV1001B003NBGI8 | Obsolete | N/A | Out of Stock | VFQFPN | 24# | Reel | 1 | 0.261ps | 25 - 25 | 1.8 - 1.8, 2.5 - 2.5, 3.3 - 3.3 | 25 - 25 | PCIe Gen1, PCIe Gen2, PCIe Gen3, PCIe Gen4 | 3.3V | LVDS | 50 - 50, 100 - 100, 125 - 125, 156.25 - 156.25 | LVDS | 3.3V | 4.0 x 4.0 x 0.8 | 200mW | No | 2500# | 0 | Yes | e3 Sn | -40 to 85°C | ||||
| 9FGV1001B004NBGI | Obsolete | N/A | In Stock | VFQFPN | 24# | Tray | 1 | 0.261ps | 25 - 25 | 1.8 - 1.8, 2.5 - 2.5, 3.3 - 3.3 | 25 - 25 | PCIe Gen1, PCIe Gen2, PCIe Gen3, PCIe Gen4 | 1.8V | LVDS | 50 - 50, 100 - 100, 125 - 125, 156.25 - 156.25 | LVDS | 1.8V | 4.0 x 4.0 x 0.8 | 125mW | No | 0 | 490# | Yes | e3 Sn | -40 to 85°C | ||||
| 9FGV1001B004NBGI8 | Obsolete | N/A | Out of Stock | VFQFPN | 24# | Reel | 1 | 0.261ps | 25 - 25 | 1.8 - 1.8, 2.5 - 2.5, 3.3 - 3.3 | 25 - 25 | PCIe Gen1, PCIe Gen2, PCIe Gen3, PCIe Gen4 | 1.8V | LVDS | 50 - 50, 100 - 100, 125 - 125, 156.25 - 156.25 | LVDS | 1.8V | 4.0 x 4.0 x 0.8 | 125mW | No | 2500# | 0 | Yes | e3 Sn | -40 to 85°C | ||||
| 9FGV1001BQ500LTGI | Obsolete | N/A | Out of Stock | LGA | 24# | Tray | 3 | 0.261ps | 25 - 25 | 1.8 - 1.8, 2.5 - 2.5, 3.3 - 3.3 | 25 - 25 | PCIe Gen1, PCIe Gen2, PCIe Gen3, PCIe Gen4 | 3.3V | LP-HCSL | 50 - 50, 100 - 100, 125 - 125, 156.25 - 156.25 | LP-HCSL | 3.3V | 4.0 x 4.0 x 1.4 | 200mW | No | 0 | 490# | Yes | e4 Au | -40 to 85°C | ||||
| 9FGV1001BQ500LTGI8 | Obsolete | N/A | Out of Stock | LGA | 24# | Reel | 3 | 0.261ps | 25 - 25 | 1.8 - 1.8, 2.5 - 2.5, 3.3 - 3.3 | 25 - 25 | PCIe Gen1, PCIe Gen2, PCIe Gen3, PCIe Gen4 | 3.3V | LP-HCSL | 50 - 50, 100 - 100, 125 - 125, 156.25 - 156.25 | LP-HCSL | 3.3V | 4.0 x 4.0 x 1.4 | 200mW | No | 2500# | 0 | Yes | e4 Au | -40 to 85°C |
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- Application NotePDF 1.53 MB R31AN0034EU0102 Rev.1.02 Oct 21, 2025AI-generated Summary: PLL loop filter design involves selecting component values to ensure stable operation and optimized phase noise. The loop bandwidth depends on parameters like charge pump current, VCO gain, and feedback divider. Second and third order passive loop filters are common, with specific calculations for cutoff, zero, and pole frequencies guiding component selection. Proper tuning of loop bandwidth enhances PLL stability and phase noise performance, demonstrated through lab experiments and calculation examples.
- Application NotePDF 431 KB 7WDXRDKU4E7E-5-59216 Dec 06, 2023
- Product Change NoticePDF 734 KB Nov 16, 2022
- Application NotePDF 256 KB Jul 05, 2021AI-generated Summary: The document explains methods to generate a 1.2V LVCMOS signal from a 1.8V LVCMOS output by attenuating the amplitude without lowering the driver voltage. It details typical LVCMOS driver and receiver configurations, impedance matching using source termination, and the use of a parallel resistor at the receiver input to reduce signal amplitude. Simulation and measurement results demonstrate that adding a parallel resistor effectively lowers the voltage to 1.2V while maintaining signal integrity and minimal impact on jitter and frequency. This approach supports flexible amplitude adjustment for various low-voltage LVCMOS requirements in clock signal applications.
Recommended Documents (1)
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- Manual - SoftwarePDF 401 KB 7WDXRDKU4E7E-5-62508 Nov 27, 2017
Manuals & Guides (2)
- Application NotePDF 1.53 MB R31AN0034EU0102 Rev.1.02 Oct 21, 2025AI-generated Summary: PLL loop filter design involves selecting component values to ensure stable operation and optimized phase noise. The loop bandwidth depends on parameters like charge pump current, VCO gain, and feedback divider. Second and third order passive loop filters are common, with specific calculations for cutoff, zero, and pole frequencies guiding component selection. Proper tuning of loop bandwidth enhances PLL stability and phase noise performance, demonstrated through lab experiments and calculation examples.
- Application NotePDF 431 KB 7WDXRDKU4E7E-5-59216 Dec 06, 2023
- Application NotePDF 1.99 MB 7WDXRDKU4E7E-5-57242 Mar 01, 2022
- Application NotePDF 256 KB Jul 05, 2021AI-generated Summary: The document explains methods to generate a 1.2V LVCMOS signal from a 1.8V LVCMOS output by attenuating the amplitude without lowering the driver voltage. It details typical LVCMOS driver and receiver configurations, impedance matching using source termination, and the use of a parallel resistor at the receiver input to reduce signal amplitude. Simulation and measurement results demonstrate that adding a parallel resistor effectively lowers the voltage to 1.2V while maintaining signal integrity and minimal impact on jitter and frequency. This approach supports flexible amplitude adjustment for various low-voltage LVCMOS requirements in clock signal applications.View More (19)
Application Notes & White Papers (19)
- Product Change NoticePDF 734 KB Nov 16, 2022
- Product Change NoticePDF 983 KB Jun 25, 2019
Product Notices (PCN, EOL, etc) (4)
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Renesas Boards & Kits
EVK9FGV1001
Active
Evaluation Kit for 9FGV1001 Programmable PhiClock™ Generator
This is the evaluation board for the 9FGV1001 programmable PhiClockTM generator. It provides a convenient way of configuring and programming the blank parts for the 9FGV1001 device. With the onboard USB interface, the Renesas Timing CommanderTM Graphical User Interface (GUI) can communicate with... Read More
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