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DB1200G Frequency Gearing Clock for Intel CPU, PCIe Gen1 & Fully Buffered DIMM Clocks

Package Information

Pkg. Type: TSSOP
Pkg. Code: PAG56
Lead Count (#): 56
Pkg. Dimensions (mm): 14.0 x 6.1 x 1.0
Pitch (mm): 0.5

Environmental & Export Classifications

Pb (Lead) Free Yes
ECCN (US) EAR99
HTS (US) 8542.39.0090
Moisture Sensitivity Level (MSL) 1

Product Attributes

Pkg. Type TSSOP
Lead Count (#) 56
Pb (Lead) Free Yes
Carrier Type Reel
Accepts Spread Spec Input Yes
Advanced Features HiBW frequency translation capability
App Jitter Compliance PCIe Gen1, PCIe Gen2, FBD
Chipset Manufacturer Intel
Clock Spec. DB1200G
Diff. Input Signaling HCSL
Diff. Inputs 1
Diff. Output Signaling HCSL
Diff. Outputs 12
Diff. Termination Resistors 48
Function Buffer
Length (mm) 14
MOQ 2000
Moisture Sensitivity Level (MSL) 1
Output Enable (OE) Pins 11
Output Freq Range (MHz) -
Package Area (mm²) 85.4
Pb Free Category e3 Sn
Pitch (mm) 0.5
Pkg. Dimensions (mm) 14.0 x 6.1 x 1.0
Power Consumption Typ (mW) 970
Published No
Qty. per Carrier (#) 0
Qty. per Reel (#) 2000
Reel Size (in) 13
Requires Terms and Conditions Does not require acceptance of Terms and Conditions
Supply Voltage (V) -
Tape & Reel Yes
Temp. Range (°C) 0 to 70°C
Thickness (mm) 1
Width (mm) 6.1

Description

IDT9FG1201 follows the Intel DB1200G Differential Buffer Specification. This buffer provides 12 output clocks for CPU Host Bus, PCIe Gen1, or Fully Buffered DIMM applications. The outputs are configured with two groups. Both groups (DIF 9:0) and (DIF 11:10) can be equal to or have a gear ratio to the input clock. A differential CPU clock from a CK410B+ main clock generator, such as the IDT932S421, drives the IDT9FG1201. The IDT9FG1201 can provide outputs up to 400MHz.