Features
- Generates common CPU/PCI Express frequencies from 14.318 MHz or 25 MHz
- Crystal or reference input
- 7 - 0.7 V HCSL differential output pairs
- 3 - 33 MHz PCI outputs
- 1 - REFOUT
- Supports Serial-ATA at 100 MHz
- Two spread spectrum modes: 0 to -0.5 downspread and +/-0.25% centerspread
- Unused inputs may be disabled in either driven or Hi-Z state for power management
Description
The 9FG107 is a Synthesizer that provides 7 differential output pairs that are compliant to the Intel CK409/ CK410 specification. It provides support for PCI-Express, next generation I/O, and SATA. The part synthesizes several output frequencies from either a 14.31818 MHz crystal or a 25 MHz crystal. The device can also be driven by a reference input clock instead of a crystal. It provides outputs with cycle-to-cycle jitter of less than 85 ps and output-to-output skew of less than 85 ps. 9FG107 also provides a copy of the reference clock and 3 33 MHz PCI output clocks. Frequency selection can be accomplished via strap pins or SMBus control.
| Part Number | Status | Samples | Stock | Package | Lead Count (#) | Temp. Grade | Pb (Lead) Free | Carrier Type |
|---|---|---|---|---|---|---|---|---|
| 9FG107AGLN | Obsolete | N/A | Out of Stock | TSSOP | 48# | C | Yes | Tube |
| 9FG107AGLNT | Obsolete | N/A | Out of Stock | TSSOP | 48# | C | Yes | Reel |
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- Application NotePDF 187 KB R31AN0065EU0101 Rev.1.01 Nov 14, 2023
- Application NotePDF 170 KB 7WDXRDKU4E7E-5-57318 May 13, 2014
- Application NotePDF 1.9 MB 7WDXRDKU4E7E-5-57315 May 13, 2014
- Application NotePDF 495 KB 7WDXRDKU4E7E-5-57312 May 12, 2014
- Application NotePDF 442 KB 7WDXRDKU4E7E-5-57298 May 08, 2014
- Application NotePDF 115 KB 7WDXRDKU4E7E-5-57294 May 07, 2014
- Application NotePDF 136 KB 7WDXRDKU4E7E-5-57044 Mar 12, 2014
- End Of Life NoticePDF 125 KB 7WDXRDKU4E7E-5-54983 Feb 28, 2013
- End Of Life NoticePDF 122 KB 7WDXRDKU4E7E-5-54827 Jan 16, 2013
Recommended Documents (1)
Datasheets (1)
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- Application NotePDF 187 KB R31AN0065EU0101 Rev.1.01 Nov 14, 2023
- Application NotePDF 1.99 MB 7WDXRDKU4E7E-5-57242 Mar 01, 2022
- Application NotePDF 170 KB 7WDXRDKU4E7E-5-57318 May 13, 2014View More (13)
Application Notes & White Papers (13)
- End Of Life NoticePDF 125 KB 7WDXRDKU4E7E-5-56239 Oct 03, 2013
- End Of Life NoticePDF 125 KB 7WDXRDKU4E7E-5-54983 Feb 28, 2013
- End Of Life NoticePDF 122 KB 7WDXRDKU4E7E-5-54827 Jan 16, 2013
- Product Change NoticePDF 201 KB 7WDXRDKU4E7E-5-41722 Dec 13, 2005
Product Notices (PCN, EOL, etc) (4)
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This is the first video in our PCIe series. In this video, we define PCIe architectures, focusing on common and separate clock architectures. Watch the rest of the video series below where Ron will cover the impact of different timing architectures.
In this episode, Ron Wade from IDT (acquired by Renesas) explains PCIe common clocking and its impact on timing solutions. Learn about using a single clock source, fan-out buffers, and the considerations for spread spectrum and non-spread spectrum clocking in PCIe systems.
In this video, we explore PCIe with separate reference clocks and the effects of clock selection. Learn how separate reference clocks work and their impact on system performance and stability.
This video provides a high-level overview of Separate Reference Clock with Independent Spread (SRIS) architectures for PCI Express systems, additional performance requirements that this clocking architecture imposes on the reference clocks, and some system implications encountered trying to implement the architecture.
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