Package Information
| Lead Count (#) | 16 |
| Pkg. Code | PGG16 |
| Pitch (mm) | 0.65 |
| Pkg. Type | TSSOP |
| Pkg. Dimensions (mm) | 5.0 x 4.4 x 1.0 |
Environmental & Export Classifications
| Moisture Sensitivity Level (MSL) | 1 |
| Pb (Lead) Free | Yes |
| ECCN (US) | EAR99 |
| HTS (US) | 8542.39.0090 |
Product Attributes
| Lead Count (#) | 16 |
| Carrier Type | Reel |
| Moisture Sensitivity Level (MSL) | 1 |
| Qty. per Reel (#) | 2500 |
| Qty. per Carrier (#) | 0 |
| Pb (Lead) Free | Yes |
| Pb Free Category | e3 Sn |
| Temp. Range (°C) | -40 to +85°C |
| Additive Phase Jitter Typ RMS (fs) | 150 |
| Additive Phase Jitter Typ RMS (ps) | 0.15 |
| Adjustable Phase | No |
| Channels (#) | 2 |
| Core Voltage (V) | 2.5, 3.3 |
| Function | Buffer |
| Input Freq (MHz) | 0 - 3000 |
| Input Type | CML, LVDS, LVPECL, SSTL |
| Inputs (#) | 2 |
| Length (mm) | 5 |
| MOQ | 2500 |
| Output Banks (#) | 2 |
| Output Freq Range (MHz) | 0 - 3000 |
| Output Skew (ps) | 15 |
| Output Type | LVDS, LVPECL |
| Output Voltage (V) | 2.5, 3.3 |
| Outputs (#) | 4 |
| Package Area (mm²) | 22.0 |
| Pitch (mm) | 0.65 |
| Pkg. Dimensions (mm) | 5.0 x 4.4 x 1.0 |
| Pkg. Type | TSSOP |
| Reel Size (in) | 13 |
| Requires Terms and Conditions | Does not require acceptance of Terms and Conditions |
| Supply Voltage (V) | 2.5 - 2.5, 3.3 - 3.3 |
| Tape & Reel | Yes |
| Thickness (mm) | 1 |
| Width (mm) | 4.4 |
Resources for 854S204I
Description
The 854S204I is a low skew, high performance dual, programmable 1-to-2 Differential-to-LVDS, LVPECL Fanout Buffer. The PCLKx, nPCLKx pairs can accept most standard differential input levels. With the selection of SEL_OUT signal, outputs can be selected be to either LVDS or LVPECL levels. The 854S204I is characterized to operate from either a 2.5V or a 3.3V power supply. Guaranteed output and bank skew characteristics make the 854S204I ideal for those clock distribution applications demanding well defined performance and repeatability. The 854S204I is a low skew, high performance dual, programmable 1-to-2 Differential-to-LVDS, LVPECL Fanout Buffer. The PCLKx, nPCLKx pairs can accept most standard differential input levels. With the selection of SEL_OUT signal, outputs can be selected be to either LVDS or LVPECL levels. The 854S204I is characterized to operate from either a 2.5V or a 3.3V power supply. Guaranteed output and bank skew characteristics make the 854S204I ideal for those clock distribution applications demanding well defined performance and repeatability.