Features
- 2:1 LVDS MUX
- One LVDS output pair
- Two differential clock inputs can accept: LVPECL or LVDS
- Maximum input/output frequency: 2.5GHz
- Translates LVCMOS/LVTTL input signals to LVDS levels by using a resistor bias network on nPCLK0, nPCLK1
- RMS additive phase jitter: 0.06ps (typical)
- Propagation delay: 600ps (maximum)
- Part-to-part skew: 350ps (maximum)
- Full 3.3V supply mode
- -40°C to 85°C ambient operating temperature
- Available in lead-free (RoHS 6) package
854S01I - Block Diagram
Description
The 854S01I is a high performance 2:1 Differential-to-LVDS Multiplexer. The 854S01I can also perform differential translation because the differential inputs accept LVPECL or LVDS levels. The 854S01I is packaged in a small 3mm x 3mm 16 VFQFN package, making it ideal for use on space constrained boards.
Parameters
| Attributes | Value |
|---|---|
| Temp. Range (°C) | -40 to 85°C |
| Product Category | Clock Multiplexers, RF Buffers |
Package Options
| Pkg. Type | Pkg. Dimensions (mm) | Lead Count (#) | Pitch (mm) |
|---|---|---|---|
| VFQFPN | 3.0 x 3.0 x 1.0 | 16 | 0.5 |
| Part Number | Status | Samples | Stock | Package | Budgetary Price (USD) | Lead Count (#) | Carrier Type | Moisture Sensitivity Level (MSL) | Qty. per Reel (#) | Qty. per Carrier (#) | Pb (Lead) Free | Pb Free Category | Temp. Range (°C) | Country of Assembly | Country of Wafer Fabrication |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 854S01AKILF | Active | Available | In Stock | VFQFPN | 1ku | $5.73 | 16# | Tray | 3 | 0 | 624# | Yes | e3 Sn | -40 to 85°C | MALAYSIA | AUSTRIA |
| 854S01AKILFT | Active | N/A | In Stock | VFQFPN | 1ku | $5.73 | 16# | Reel | 3 | 2500# | 0 | Yes | e3 Sn | -40 to 85°C | MALAYSIA | AUSTRIA |
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- Product Change NoticePDF 728 KB May 13, 2022
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- Application NotePDF 442 KB 7WDXRDKU4E7E-5-57298 May 08, 2014
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- Application NotePDF 160 KB 7WDXRDKU4E7E-5-57287 May 06, 2014
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- Application NotePDF 1.99 MB 7WDXRDKU4E7E-5-57242 Mar 01, 2022
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