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Features

  • Twenty-two differential HSTL outputs each with the ability to drive 50? to ground
  • Selectable differential CLK, nCLK or LVPECL clock inputs
  • CLK, nCLK pair can accept the following differential input levels: LVPECL, LVDS, HSTL, SSTL, HCSL
  • PCLK, nPCLK supports the following input types: LVPECL, CML, SSTL
  • Maximum output frequency: 500MHz
  • Translates any single-ended input signal (LVCMOS, LVTTL, GTL) to HSTL levels with resistor bias on nCLK input
  • Output skew: 80ps (maximum)
  • Part-to-part skew: 700ps (maximum)
  • Jitter, RMS: 0.04ps (typical)
  • LVPECL and HSTL mode operating voltage supply range: VDD = 3.3V ± 5%, VDDO = 1.6V to 2V, GND = 0V
  • 0°C to 85°C ambient operating temperature

Description

The 8524 is a low skew, 1-to-22 Differential-to-HSTL Fanout Buffer . The 8524 has two selectable clock inputs. The CLK, nCLK pair can accept most standard differential input levels. The PCLK, nPCLK pair can accept LVPECL, CML, or SSTL input levels. The device is internally synchronized to eliminate runt pulses on the outputs during asynchronous assertion/deassertion of the OE pin. The 8524's low output and part-to-part skew characteristics make it ideal for workstation, server, and other high performance clock distribution applications.

Part NumberStatusSamplesStockPackageLead Count (#)Carrier TypeMoisture Sensitivity Level (MSL)Qty. per Reel (#)Qty. per Carrier (#)Pb (Lead) FreePb Free CategoryTemp. Range (°C)
8524AYLFObsoleteN/AIn StockTQFP64#Tray30160#Yese3 Sn0 to 70°C
8524AYLFTObsoleteN/AIn StockTQFP64#Reel3500#0Yese3 Sn0 to 70°C

Support Communities

  1. Crash on hw_cpm_pll_sys_on()

    Hi, I have two da14683 USB Development Kit. In my system_init() function I call  cm_sys_clk_init(sysclk_PLL96); to speed up.    cm_sys_clk_init() calls in turn this code where in switch_to_pll(). if (cm_poll_xtal16m_ready()) { switch_to_xtal16(); if ((type == sysclk_PLL48 ...

    Apr 27, 2020
  2. Sleep mode configuration

    Hi All, I have been working with DA14583 MCU. Now my custom board is ready with the PIR sensor Azoteq(IQS621) MCU. All my functionalities are working fine without any issue with the Azoteq sensor interfaced with DA14583. Now, I need to make a sleep mode configuration where my custom ...

    Jan 27, 2020
  3. RZ/V2M U-boot: "Bad Linux ARM64 Image magic!"

    I have built the image for RZ/V2M (SOC_FAMILY = "rzv2m:r9a09g011gbg") as described in "RZ/V2M Linux Package Start-Up Guide". I'm getting errors as below. [BL1] Loaded the 2nd boot loader [BL1] Kick the 2nd boot loader [BL2] 2nd boot loader entered [BL2] DDR initializatioM ...

    Apr 18, 2023
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