Features
- One LVCMOS/LVTTL output
- Differential CLK/nCLK input pair
- CLK/nCLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL
- Output frequency: 350MHz (typical)
- Part-to-part skew: 500ps (maximum)
- Additive phase jitter, RMS: 0.21ps (typical), 3.3V output
- Full 3.3V and 2.5V operating supply
- -40°C to 85°C ambient operating temperature
83021I - Block Diagram
Description
The 83021I is a 1-to-1 Differential-to-LVCMOS/ LVTTL Translator and a member of the family of High Performance Clock Solutions from IDT. The differential input is highly flexible and can accept the following input types: LVPECL, LVDS, LVHSTL, SSTL, and HCSL. The small 8-lead SOIC footprint makes this device ideal for use in applications with limited board space.
| Part Number | Status | Samples | Stock | Package | Lead Count (#) | Carrier Type | Moisture Sensitivity Level (MSL) | Qty. per Reel (#) | Qty. per Carrier (#) | Pb (Lead) Free | Pb Free Category | Temp. Range (°C) |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 83021AMILF | Obsolete | N/A | In Stock | SOIC | 8# | Tube | 1 | 0 | 97# | Yes | e3 Sn | -40 to 85°C |
| 83021AMILFT | Obsolete | N/A | In Stock | SOIC | 8# | Reel | 1 | 3000# | 0 | Yes | e3 Sn | -40 to 85°C |
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- Application NotePDF 187 KB R31AN0065EU0101 Rev.1.01 Nov 14, 2023
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- Application NotePDF 187 KB R31AN0065EU0101 Rev.1.01 Nov 14, 2023
- Application NotePDF 1.99 MB 7WDXRDKU4E7E-5-57242 Mar 01, 2022
- Application NotePDF 170 KB 7WDXRDKU4E7E-5-57318 May 13, 2014View More (12)
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- End Of Life NoticePDF 743 KB Jun 11, 2020
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