Description
The 7542 Group is supported only for customers who have already adopted these products.
| Part Number | Status | Samples | Stock | RoHS | Package | Bit Size | Lead Count (#) | Operating Freq (Max) (MHz) | CPU | LVD or PVD | DMA | Timer | ADC | Ethernet | Temp. Range (°C) |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| M37542F4FP#U0 | Obsolete | N/A | In Stock | RoHS:EN RoHS:JA | SSOP | 8 | 36# | 2MHz | 740 | No | No | 8-bit x 2-ch, 16-bit x 2-ch | 10-bit x 8-ch | No | |
| M37542F4FP#W4 | Obsolete | N/A | Out of Stock | RoHS:EN RoHS:JA | SSOP | 8 | 36# | 2MHz | 740 | No | No | 8-bit x 2-ch, 16-bit x 2-ch | 10-bit x 8-ch | No | |
| M37542F4GP#U0 | Obsolete | N/A | In Stock | RoHS:EN RoHS:JA | Package | 8 | 740 | No | No | 8-bit x 2-ch, 16-bit x 2-ch | 10-bit x 6-ch | No | -20 to +85 | ||
| M37542F4GP#W4 | Obsolete | N/A | Out of Stock | RoHS:EN RoHS:JA | Package | 8 | 740 | No | No | 8-bit x 2-ch, 16-bit x 2-ch | 10-bit x 6-ch | No | -20 to +85 | ||
| M37542F4SP#U0 | Obsolete | N/A | Out of Stock | RoHS:EN RoHS:JA | SDIP | 8 | 32# | 740 | No | No | 8-bit x 2-ch, 16-bit x 2-ch | 10-bit x 6-ch | No | -20 to +85 | |
| M37542F8FP#U0 | Obsolete | N/A | Out of Stock | RoHS:EN RoHS:JA | SSOP | 8 | 36# | 740 | No | No | 8-bit x 2-ch, 16-bit x 2-ch | 10-bit x 8-ch | No | -20 to +85 | |
| M37542F8FP#W4 | Obsolete | N/A | Out of Stock | RoHS:EN RoHS:JA | SSOP | 8 | 36# | 740 | No | No | 8-bit x 2-ch, 16-bit x 2-ch | 10-bit x 8-ch | No | -20 to +85 | |
| M37542F8GP#U0 | Obsolete | N/A | In Stock | RoHS:EN RoHS:JA | Package | 8 | 740 | No | No | 8-bit x 2-ch, 16-bit x 2-ch | 10-bit x 6-ch | No | -20 to +85 | ||
| M37542F8SP#U0 | Obsolete | N/A | Out of Stock | RoHS:EN RoHS:JA | SDIP | 8 | 32# | 740 | No | No | 8-bit x 2-ch, 16-bit x 2-ch | 10-bit x 6-ch | No | -20 to +85 | |
| M37542M2-XXXSP | Obsolete | N/A | Out of Stock | Contact | Package | 8 | 32# | 740 | No | No | 8-bit x 2-ch, 16-bit x 2-ch | 10-bit x 6-ch | No |
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- Product Change Notice
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- Application NoteAI-generated Summary: The document explains the operation of three-phase motor control timers in sawtooth wave modulation mode for M32C/84, 85, 87, 88, 8A, and 8B groups. It details how the IDBO and IDB1 registers determine individual phase output signal levels, with signals output at specific timer edges. Dead time between switching signals is configurable via the DTT register and controlled by the INV14 bit in the INVC1 register. Examples of default PWM register values and signal timing diagrams illustrate the modulation and output process.Related Files:
- Application NoteAI-generated Summary: The document presents performance data of the signal processing library on SH2A-FPU and RX devices, detailing CPU cycles for various DSP functions such as FFT, FIR, and IIR filters across different sample sizes and coefficients. It also provides Renesas Electronics website and support contact information. The revision record notes the first edition release date as December 17, 2010.Related Files:
- Application NoteAI-generated Summary: The document demonstrates the use of the H8S/38076 microcontroller's real-time clock (RTC) and LCD peripherals across seven power modes. It includes system and peripheral overviews, detailed register descriptions for RTC and LCD controllers, and software functions for initialization, power mode setting, and LCD updating. The document also covers interrupt service routines, current consumption measurement techniques, memory allocation, and code structure.Related Files:
- Application NoteAI-generated Summary: The document explains serial I/O connections for the 7542 Group MCU, detailing examples of interfacing with peripheral ICs equipped with CS pins and connections between multiple ICs. It covers transmission-only, transmission and reception modes, and the use of N-channel open-drain outputs for TxD1 pins. Additionally, it describes serial I/O connections between MCUs using internal or external clocks, including the SRDY1 signal function in UART mode. Pin assignments for serial I/O1 and I/O2 are clarified.
- Application NoteAI-generated Summary: The oscillation stop detection function monitors the main clock oscillation in the 7542 Group MCU using a ceramic resonator. It triggers a reset when oscillation stops and retains the detection status bit until cleared. The system confirms clock oscillation before starting the main process and disables the watchdog timer. Relevant register settings and control procedures manage the detection and reset functions, ensuring stable clock operation and appropriate countermeasures if oscillation fails.Related Files:
- Application NoteAI-generated Summary: This document explains the operation of Timer A in the M16C/64 group for processing 2-phase pulse signals in event counter mode using normal processing. It details the selection of specific functions, including count operation type, reload type, and output polar control. The timer counts effective edges based on input signals, continues counting through underflow and overflow without reloading, and triggers interrupts accordingly. Timing diagrams illustrate start count, overflow, and underflow events.Related Files:
- Application NoteAI-generated Summary: The document explains how the 7542 Group MCU manages clock generation during power failures. It switches from a high-speed main clock to a low-power on-chip oscillator mode when a power failure is detected. The system uses a timer interrupt every 30 ms to check conditions for exiting the power failure state. Once stable, the main clock resumes, and the system returns to high-speed mode. Relevant register settings and mode transitions are detailed.Related Files:
- Application NotePDF 141 KB REJ05B1139-0100 Rev.1.00 Mar 26, 2008AI-generated Summary: The 7542 Group MCU supports two power-saving modes: stop mode and wait mode. In stop mode, executing the STP instruction halts the CPU, main clock, and peripherals, significantly reducing power consumption. I/O ports and timers maintain their states, while the watchdog timer stops. Exiting stop mode requires an enabled interrupt or reset, with a stabilization period for the clock oscillation before normal operation resumes. Proper configuration of input/output ports and A/D conversion completion helps minimize power use.
- Application NoteAI-generated Summary: This document details the differences between the 7546/47 Group and the 7544 Group (QZROM version) microcontrollers. It compares product models, package types, ROM/RAM sizes, I/O ports, interrupts, timers, serial interfaces, A/D converters, and built-in circuits such as watchdog timers and power-on reset. It also outlines pin configurations and memory maps, highlighting variations in function set ROM areas and features like oscillator modes and watchdog timer operations.
- Application NoteAI-generated Summary: The 7542 Group MCU performs A/D conversion by resetting the AD conversion completion bit and comparing the analog input voltage with a reference voltage through successive bit evaluations in the A/D conversion buffer register. Conversion completes in either 122 or 61 clock cycles depending on the clock selection bit, with results stored in specific registers and an interrupt generated upon completion. The document includes equivalent circuit diagrams and timing charts illustrating the conversion process.
- Application NoteAI-generated Summary: The bus collision detection function in the 7546 Group MCU detects conflicts during serial transmission on SIO1 by comparing the TxD1 and RxD1 pins. When a mismatch occurs, an interrupt signals a collision. This function supports full-duplex communication and uses an N-channel open-drain bus with pull-up resistors to manage multiple UART transmission requests. Arbitration occurs when multiple MCUs transmit simultaneously, prioritizing low-level signals and stopping the losing transmission immediately.Related Files:
Recommended Documents (1)
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Manuals & Guides (1)
- Application NoteAI-generated Summary: The document explains the operation of three-phase motor control timers in sawtooth wave modulation mode for M32C/84, 85, 87, 88, 8A, and 8B groups. It details how the IDBO and IDB1 registers determine individual phase output signal levels, with signals output at specific timer edges. Dead time between switching signals is configurable via the DTT register and controlled by the INV14 bit in the INVC1 register. Examples of default PWM register values and signal timing diagrams illustrate the modulation and output process.Related Files:
- Application NoteAI-generated Summary: The document presents performance data of the signal processing library on SH2A-FPU and RX devices, detailing CPU cycles for various DSP functions such as FFT, FIR, and IIR filters across different sample sizes and coefficients. It also provides Renesas Electronics website and support contact information. The revision record notes the first edition release date as December 17, 2010.Related Files:
- Application NoteAI-generated Summary: The document demonstrates the use of the H8S/38076 microcontroller's real-time clock (RTC) and LCD peripherals across seven power modes. It includes system and peripheral overviews, detailed register descriptions for RTC and LCD controllers, and software functions for initialization, power mode setting, and LCD updating. The document also covers interrupt service routines, current consumption measurement techniques, memory allocation, and code structure.Related Files:
- Application NoteAI-generated Summary: The document explains serial I/O connections for the 7542 Group MCU, detailing examples of interfacing with peripheral ICs equipped with CS pins and connections between multiple ICs. It covers transmission-only, transmission and reception modes, and the use of N-channel open-drain outputs for TxD1 pins. Additionally, it describes serial I/O connections between MCUs using internal or external clocks, including the SRDY1 signal function in UART mode. Pin assignments for serial I/O1 and I/O2 are clarified.
- Application NoteAI-generated Summary: The oscillation stop detection function monitors the main clock oscillation in the 7542 Group MCU using a ceramic resonator. It triggers a reset when oscillation stops and retains the detection status bit until cleared. The system confirms clock oscillation before starting the main process and disables the watchdog timer. Relevant register settings and control procedures manage the detection and reset functions, ensuring stable clock operation and appropriate countermeasures if oscillation fails.Related Files:View More (47)
Application Notes & White Papers (47)
- Product Change Notice
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Product Notices (PCN, EOL, etc) (3)
- Technical Update
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Errata & Technical Updates (7)
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- IDE and Coding ToolRenesas integrated development environment (IDE) (for SuperH, RX, R8C, M32R, M16C, H8SX, H8S, H8, and 740 families).
- Compiler/AssemblerAssembler Package for 740 Family, * Comes with High-performance Embedded Workshop and the simulator debugger.
- Compiler/AssemblerC Compiler Package for 740 Family. High-performance Embedded Workshop and Simulator debugger included.
- EmulatorEmulator for M16C, 7700, 740 Families [Overseas Standards Compliant]. Support for 20MHz-or-less operation of target MCU.
- Programmer (Unit/SW)On-chip debugging emulator available as a flash memory programmer [Available flash programming software: Flash Development Toolkit]
- Programmer (Unit/SW)On-chip debugging emulator available as a flash memory programmer [Available flash programming software: Flash Development Toolkit] [Support MCU/MPU and devices: SuperH RISC engine, R8C, M16C, H8SX, H8S, H8, 740]
- Programmer (Unit/SW)Flash memory programming software. [Support MCU/MPU and devices: SuperH RISC engine, RX, R8C, M16C, H8SX, H8S, H8, 740]
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- SimulatorSimulator Debugger for 740 Family [Support IDE : High-performance Embedded Workshop] (Note: This product is included in Compiler Package and Assembler Package, and is not available separately.)
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- IDE and Coding ToolRenesas integrated development environment (IDE) (for SuperH, RX, R8C, M32R, M16C, H8SX, H8S, H8, and 740 families).
- Compiler/AssemblerAssembler Package for 740 Family, * Comes with High-performance Embedded Workshop and the simulator debugger.
- Compiler/AssemblerC Compiler Package for 740 Family. High-performance Embedded Workshop and Simulator debugger included.
- EmulatorEmulator for M16C, 7700, 740 Families [Overseas Standards Compliant]. Support for 20MHz-or-less operation of target MCU.
- Programmer (Unit/SW)On-chip debugging emulator available as a flash memory programmer [Available flash programming software: Flash Development Toolkit]View More (13)
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